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!BMC external buildroot tree. For building minimal Raptorcs Blackbird/Talos II bmc images.
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br-blackbird-external/board/bangBMC/blackbird.dts

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  1. /dts-v1/;

  2. 

  3. / {

  4. 	compatible = "rcs,blackbird-bmc\0aspeed,ast2500";

  5. 	model = "Blackbird BMC";

  6. 	interrupt-parent = <0x01>;

  7. 	#address-cells = <0x01>;

  8. 	#size-cells = <0x01>;

  9. 

  10. 	reserved-memory {

  11. 		ranges;

  12. 		#address-cells = <0x01>;

  13. 		#size-cells = <0x01>;

  14. 

  15. 		region@98000000 {

  16. 			no-map;

  17. 			phandle = <0x19>;

  18. 			reg = <0x98000000 0x4000000>;

  19. 		};

  20. 

  21. 		framebuffer@9f000000 {

  22. 			no-map;

  23. 			reg = <0x9f000000 0x1000000>;

  24. 		};

  25. 

  26. 		jpegbuffer {

  27. 			reusable;

  28. 			compatible = "shared-dma-pool";

  29. 			alignment = <0x1000000>;

  30. 			size = <0x2000000>;

  31. 			phandle = <0x0c>;

  32. 		};

  33. 

  34. 		codefire_memory@9ef00000 {

  35. 			no-map;

  36. 			phandle = <0x29>;

  37. 			reg = <0x9ef00000 0x100000>;

  38. 		};

  39. 

  40. 		framebuffer {

  41. 			reusable;

  42. 			compatible = "shared-dma-pool";

  43. 			alignment = <0x1000000>;

  44. 			size = <0x1000000>;

  45. 			phandle = <0x0b>;

  46. 		};

  47. 	};

  48. 

  49. 	gpio-fsi {

  50. 		data-gpios = <0x28 0x3a 0x00>;

  51. 		clock-gpios = <0x28 0x3b 0x00>;

  52. 		compatible = "aspeed,ast2500-cf-fsi-master\0fsi-master";

  53. 		no-gpio-delays;

  54. 		mux-gpios = <0x28 0x06 0x00>;

  55. 		aspeed,cvic = <0x2b>;

  56. 		#address-cells = <0x02>;

  57. 		memory-region = <0x29>;

  58. 		#size-cells = <0x00>;

  59. 		aspeed,sram = <0x2a>;

  60. 		enable-gpios = <0x28 0x18 0x00>;

  61. 		trans-gpios = <0x28 0x39 0x00>;

  62. 

  63. 		cfam@0,0 {

  64. 			chip-id = <0x00>;

  65. 			#address-cells = <0x01>;

  66. 			#size-cells = <0x01>;

  67. 			reg = <0x00 0x00>;

  68. 

  69. 			i2c@1800 {

  70. 				compatible = "ibm,fsi-i2c-master";

  71. 				#address-cells = <0x01>;

  72. 				#size-cells = <0x00>;

  73. 				reg = <0x1800 0x400>;

  74. 

  75. 				i2c-bus@4 {

  76. 					reg = <0x04>;

  77. 				};

  78. 

  79. 				i2c-bus@b {

  80. 					reg = <0x0b>;

  81. 				};

  82. 

  83. 				i2c-bus@2 {

  84. 					reg = <0x02>;

  85. 				};

  86. 

  87. 				i2c-bus@0 {

  88. 					reg = <0x00>;

  89. 				};

  90. 

  91. 				i2c-bus@9 {

  92. 					reg = <0x09>;

  93. 				};

  94. 

  95. 				i2c-bus@7 {

  96. 					reg = <0x07>;

  97. 				};

  98. 

  99. 				i2c-bus@e {

  100. 					reg = <0x0e>;

  101. 				};

  102. 

  103. 				i2c-bus@5 {

  104. 					reg = <0x05>;

  105. 				};

  106. 

  107. 				i2c-bus@c {

  108. 					reg = <0x0c>;

  109. 				};

  110. 

  111. 				i2c-bus@3 {

  112. 					reg = <0x03>;

  113. 				};

  114. 

  115. 				i2c-bus@a {

  116. 					reg = <0x0a>;

  117. 				};

  118. 

  119. 				i2c-bus@1 {

  120. 					reg = <0x01>;

  121. 				};

  122. 

  123. 				i2c-bus@8 {

  124. 					reg = <0x08>;

  125. 				};

  126. 

  127. 				i2c-bus@6 {

  128. 					reg = <0x06>;

  129. 				};

  130. 

  131. 				i2c-bus@d {

  132. 					reg = <0x0d>;

  133. 				};

  134. 			};

  135. 

  136. 			hub@3400 {

  137. 				compatible = "fsi-master-hub";

  138. 				no-scan-on-init;

  139. 				#address-cells = <0x02>;

  140. 				#size-cells = <0x00>;

  141. 				reg = <0x3400 0x400>;

  142. 

  143. 				cfam@1,0 {

  144. 					chip-id = <0x01>;

  145. 					#address-cells = <0x01>;

  146. 					#size-cells = <0x01>;

  147. 					reg = <0x01 0x00>;

  148. 

  149. 					i2c@1800 {

  150. 						compatible = "ibm,fsi-i2c-master";

  151. 						#address-cells = <0x01>;

  152. 						#size-cells = <0x00>;

  153. 						reg = <0x1800 0x400>;

  154. 

  155. 						i2c-bus@4 {

  156. 							reg = <0x04>;

  157. 						};

  158. 

  159. 						i2c-bus@b {

  160. 							reg = <0x0b>;

  161. 						};

  162. 

  163. 						i2c-bus@2 {

  164. 							reg = <0x02>;

  165. 						};

  166. 

  167. 						i2c-bus@0 {

  168. 							reg = <0x00>;

  169. 						};

  170. 

  171. 						i2c-bus@9 {

  172. 							reg = <0x09>;

  173. 						};

  174. 

  175. 						i2c-bus@7 {

  176. 							reg = <0x07>;

  177. 						};

  178. 

  179. 						i2c-bus@e {

  180. 							reg = <0x0e>;

  181. 						};

  182. 

  183. 						i2c-bus@5 {

  184. 							reg = <0x05>;

  185. 						};

  186. 

  187. 						i2c-bus@c {

  188. 							reg = <0x0c>;

  189. 						};

  190. 

  191. 						i2c-bus@3 {

  192. 							reg = <0x03>;

  193. 						};

  194. 

  195. 						i2c-bus@a {

  196. 							reg = <0x0a>;

  197. 						};

  198. 

  199. 						i2c-bus@1 {

  200. 							reg = <0x01>;

  201. 						};

  202. 

  203. 						i2c-bus@8 {

  204. 							reg = <0x08>;

  205. 						};

  206. 

  207. 						i2c-bus@6 {

  208. 							reg = <0x06>;

  209. 						};

  210. 

  211. 						i2c-bus@d {

  212. 							reg = <0x0d>;

  213. 						};

  214. 					};

  215. 

  216. 					hub@3400 {

  217. 						compatible = "fsi-master-hub";

  218. 						no-scan-on-init;

  219. 						#address-cells = <0x02>;

  220. 						#size-cells = <0x00>;

  221. 						reg = <0x3400 0x400>;

  222. 					};

  223. 

  224. 					scom@1000 {

  225. 						compatible = "ibm,fsi2pib";

  226. 						reg = <0x1000 0x400>;

  227. 					};

  228. 

  229. 					sbefifo@2400 {

  230. 						compatible = "ibm,p9-sbefifo";

  231. 						#address-cells = <0x01>;

  232. 						#size-cells = <0x00>;

  233. 						reg = <0x2400 0x400>;

  234. 

  235. 						occ {

  236. 							compatible = "ibm,p9-occ";

  237. 							reg = <0x02>;

  238. 						};

  239. 					};

  240. 				};

  241. 			};

  242. 

  243. 			scom@1000 {

  244. 				compatible = "ibm,fsi2pib";

  245. 				reg = <0x1000 0x400>;

  246. 			};

  247. 

  248. 			sbefifo@2400 {

  249. 				compatible = "ibm,p9-sbefifo";

  250. 				#address-cells = <0x01>;

  251. 				#size-cells = <0x00>;

  252. 				reg = <0x2400 0x400>;

  253. 

  254. 				occ {

  255. 					compatible = "ibm,p9-occ";

  256. 					reg = <0x01>;

  257. 				};

  258. 			};

  259. 		};

  260. 	};

  261. 

  262. 	gpio-keys {

  263. 		compatible = "gpio-keys";

  264. 

  265. 		id-button {

  266. 			gpios = <0x28 0x87 0x01>;

  267. 			label = "id-button";

  268. 			linux,code = <0x87>;

  269. 		};

  270. 

  271. 		checkstop {

  272. 			gpios = <0x28 0x4a 0x01>;

  273. 			label = "checkstop";

  274. 			linux,code = <0x4a>;

  275. 		};

  276. 	};

  277. 

  278. 	leds {

  279. 		compatible = "gpio-leds";

  280. 

  281. 		identify {

  282. 			gpios = <0x28 0x6c 0x00>;

  283. 		};

  284. 

  285. 		power {

  286. 			gpios = <0x28 0x8d 0x01>;

  287. 		};

  288. 

  289. 		bmc_beep {

  290. 			gpios = <0x28 0x6f 0x01>;

  291. 		};

  292. 

  293. 		bmc_ready {

  294. 			gpios = <0x28 0x89 0x01>;

  295. 		};

  296. 

  297. 		fault {

  298. 			gpios = <0x28 0x6a 0x01>;

  299. 		};

  300. 	};

  301. 

  302. 	aliases {

  303. 		i2c3 = "/ahb/apb/bus@1e78a000/i2c-bus@100";

  304. 		i2c202 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@2";

  305. 		i2c108 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@8";

  306. 		i2c10 = "/ahb/apb/bus@1e78a000/i2c-bus@3c0";

  307. 		i2c210 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@a";

  308. 		i2c1 = "/ahb/apb/bus@1e78a000/i2c-bus@80";

  309. 		i2c200 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@0";

  310. 		i2c106 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@6";

  311. 		i2c209 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@9";

  312. 		i2c114 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@e";

  313. 		i2c104 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@4";

  314. 		serial5 = "/ahb/apb/serial@1e787000";

  315. 		i2c8 = "/ahb/apb/bus@1e78a000/i2c-bus@340";

  316. 		i2c207 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@7";

  317. 		i2c112 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@c";

  318. 		i2c102 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@2";

  319. 		serial3 = "/ahb/apb/serial@1e78f000";

  320. 		i2c6 = "/ahb/apb/bus@1e78a000/i2c-bus@1c0";

  321. 		i2c205 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@5";

  322. 		i2c110 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@a";

  323. 		i2c13 = "/ahb/apb/bus@1e78a000/i2c-bus@480";

  324. 		i2c100 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@0";

  325. 		i2c213 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@d";

  326. 		serial1 = "/ahb/apb/serial@1e78d000";

  327. 		i2c4 = "/ahb/apb/bus@1e78a000/i2c-bus@140";

  328. 		i2c203 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@3";

  329. 		peci0 = "/ahb/apb/bus@1e78b000/peci-bus@0";

  330. 		i2c109 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@9";

  331. 		i2c11 = "/ahb/apb/bus@1e78a000/i2c-bus@400";

  332. 		i2c211 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@b";

  333. 		i2c2 = "/ahb/apb/bus@1e78a000/i2c-bus@c0";

  334. 		i2c201 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@1";

  335. 		i2c107 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@7";

  336. 		i2c0 = "/ahb/apb/bus@1e78a000/i2c-bus@40";

  337. 		i2c105 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@5";

  338. 		i2c9 = "/ahb/apb/bus@1e78a000/i2c-bus@380";

  339. 		i2c208 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@8";

  340. 		i2c113 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@d";

  341. 		i2c103 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@3";

  342. 		serial4 = "/ahb/apb/serial@1e784000";

  343. 		i2c7 = "/ahb/apb/bus@1e78a000/i2c-bus@300";

  344. 		i2c206 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@6";

  345. 		i2c111 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@b";

  346. 		i2c101 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@1";

  347. 		i2c214 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@e";

  348. 		serial2 = "/ahb/apb/serial@1e78e000";

  349. 		i2c5 = "/ahb/apb/bus@1e78a000/i2c-bus@180";

  350. 		i2c204 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@4";

  351. 		i2c12 = "/ahb/apb/bus@1e78a000/i2c-bus@440";

  352. 		i2c212 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@c";

  353. 		serial0 = "/ahb/apb/serial@1e783000";

  354. 	};

  355. 

  356. 	chosen {

  357. 		stdout-path = "/ahb/apb/serial@1e784000";

  358. 		bootargs = "console=ttyS4,115200n8";

  359. 	};

  360. 

  361. 	iio-hwmon-battery {

  362. 		io-channels = <0x2c 0x0c>;

  363. 		compatible = "iio-hwmon";

  364. 	};

  365. 

  366. 	memory@80000000 {

  367. 		device_type = "memory";

  368. 		reg = <0x80000000 0x1f000000>;

  369. 	};

  370. 

  371. 	ahb {

  372. 		compatible = "simple-bus";

  373. 		ranges;

  374. 		#address-cells = <0x01>;

  375. 		#size-cells = <0x01>;

  376. 

  377. 		interrupt-controller@1e6c0080 {

  378. 			compatible = "aspeed,ast2400-vic";

  379. 			#interrupt-cells = <0x01>;

  380. 			phandle = <0x01>;

  381. 			valid-sources = <0xfefff7ff 0x807ffff>;

  382. 			reg = <0x1e6c0080 0x80>;

  383. 			interrupt-controller;

  384. 		};

  385. 

  386. 		usb@1e6b0000 {

  387. 			compatible = "aspeed,ast2500-uhci\0generic-uhci";

  388. 			clocks = <0x02 0x09>;

  389. 			#ports = <0x02>;

  390. 			status = "disabled";

  391. 			interrupts = <0x0e>;

  392. 			reg = <0x1e6b0000 0x100>;

  393. 		};

  394. 

  395. 		spi@1e631000 {

  396. 			compatible = "aspeed,ast2500-spi";

  397. 			clocks = <0x02 0x19>;

  398. 			status = "disabled";

  399. 			#address-cells = <0x01>;

  400. 			#size-cells = <0x00>;

  401. 			reg = <0x1e631000 0xc4 0x38000000 0x8000000>;

  402. 

  403. 			flash@1 {

  404. 				compatible = "jedec,spi-nor";

  405. 				status = "disabled";

  406. 				reg = <0x01>;

  407. 				spi-max-frequency = <0x2faf080>;

  408. 			};

  409. 

  410. 			flash@0 {

  411. 				compatible = "jedec,spi-nor";

  412. 				status = "disabled";

  413. 				reg = <0x00>;

  414. 				spi-max-frequency = <0x2faf080>;

  415. 			};

  416. 		};

  417. 

  418. 		spi@1e620000 {

  419. 			compatible = "aspeed,ast2500-fmc";

  420. 			clocks = <0x02 0x19>;

  421. 			status = "okay";

  422. 			#address-cells = <0x01>;

  423. 			interrupts = <0x13>;

  424. 			#size-cells = <0x00>;

  425. 			reg = <0x1e620000 0xc4 0x20000000 0x10000000>;

  426. 

  427. 			flash@1 {

  428. 				compatible = "jedec,spi-nor";

  429. 				status = "disabled";

  430. 				reg = <0x01>;

  431. 				spi-max-frequency = <0x2faf080>;

  432. 			};

  433. 

  434. 			flash@2 {

  435. 				compatible = "jedec,spi-nor";

  436. 				status = "disabled";

  437. 				reg = <0x02>;

  438. 				spi-max-frequency = <0x2faf080>;

  439. 			};

  440. 

  441. 			flash@0 {

  442. 				m25p,fast-read;

  443. 				compatible = "jedec,spi-nor";

  444. 				status = "okay";

  445. 				label = "bmc";

  446. 				reg = <0x00>;

  447. 				spi-max-frequency = <0x17d7840>;

  448. 

  449. 				partitions {

  450. 					compatible = "fixed-partitions";

  451. 					#address-cells = <0x01>;

  452. 					#size-cells = <0x01>;

  453. 

  454. 					dev-data@680000 {

  455. 						label = "dev-data";

  456. 						reg = <0x680000 0x100000>;

  457. 					};

  458. 

  459. 					u-boot-env@60000 {

  460. 						label = "u-boot-env";

  461. 						reg = <0x60000 0x20000>;

  462. 					};

  463. 

  464. 					u-boot@0 {

  465. 						label = "u-boot";

  466. 						reg = <0x00 0x60000>;

  467. 					};

  468. 

  469. 					kernel_a@80000 {

  470. 						label = "kernel_a";

  471. 						reg = <0x80000 0x600000>;

  472. 					};

  473. 

  474. 					rwfs@d80000 {

  475. 						label = "rwfs";

  476. 						reg = <0xd80000 0x1280000>;

  477. 					};

  478. 

  479.                     kernel_b@780000 {

  480. 						label = "kernel_b";

  481. 						reg = <0x780000 0x600000>;

  482.                     };

  483. 				};

  484. 			};

  485. 		};

  486. 

  487. 		ethernet@1e680000 {

  488. 			compatible = "aspeed,ast2500-mac\0faraday,ftgmac100";

  489. 			clocks = <0x02 0x12>;

  490. 			status = "disabled";

  491. 			interrupts = <0x03>;

  492. 			reg = <0x1e680000 0x180>;

  493. 		};

  494. 

  495. 		usb-vhub@1e6a0000 {

  496. 			compatible = "aspeed,ast2500-usb-vhub";

  497. 			clocks = <0x02 0x0c>;

  498. 			status = "okay";

  499. 			interrupts = <0x05>;

  500. 			reg = <0x1e6a0000 0x300>;

  501. 			pinctrl-0 = <0x07>;

  502. 			pinctrl-names = "default";

  503. 		};

  504. 

  505. 		spi@1e630000 {

  506. 			compatible = "aspeed,ast2500-spi";

  507. 			clocks = <0x02 0x19>;

  508. 			status = "okay";

  509. 			#address-cells = <0x01>;

  510. 			#size-cells = <0x00>;

  511. 			phandle = <0x1a>;

  512. 			reg = <0x1e630000 0xc4 0x30000000 0x8000000>;

  513. 			pinctrl-0 = <0x03>;

  514. 			pinctrl-names = "default";

  515. 

  516. 			flash@1 {

  517. 				compatible = "jedec,spi-nor";

  518. 				status = "disabled";

  519. 				reg = <0x01>;

  520. 				spi-max-frequency = <0x2faf080>;

  521. 			};

  522. 

  523. 			flash@0 {

  524. 				m25p,fast-read;

  525. 				compatible = "jedec,spi-nor";

  526. 				status = "okay";

  527. 				label = "pnor";

  528. 				reg = <0x00>;

  529. 				spi-max-frequency = <0x5f5e100>;

  530. 			};

  531. 		};

  532. 

  533. 		usb@1e6a1000 {

  534. 			compatible = "aspeed,ast2500-ehci\0generic-ehci";

  535. 			clocks = <0x02 0x0c>;

  536. 			status = "disabled";

  537. 			interrupts = <0x05>;

  538. 			reg = <0x1e6a1000 0x100>;

  539. 			pinctrl-0 = <0x05>;

  540. 			pinctrl-names = "default";

  541. 		};

  542. 

  543. 		copro-interrupt-controller@1e6c2000 {

  544. 			compatible = "aspeed,ast2500-cvic\0aspeed-cvic";

  545. 			copro-sw-interrupts = <0x01>;

  546. 			phandle = <0x2b>;

  547. 			valid-sources = <0xffffffff>;

  548. 			reg = <0x1e6c2000 0x80>;

  549. 		};

  550. 

  551. 		ethernet@1e660000 {

  552. 			compatible = "aspeed,ast2500-mac\0faraday,ftgmac100";

  553. 			clocks = <0x02 0x11>;

  554. 			status = "okay";

  555. 			interrupts = <0x02>;

  556. 			use-ncsi;

  557. 			reg = <0x1e660000 0x180>;

  558. 			pinctrl-0 = <0x04>;

  559. 			pinctrl-names = "default";

  560. 		};

  561. 

  562. 		usb@1e6a3000 {

  563. 			compatible = "aspeed,ast2500-ehci\0generic-ehci";

  564. 			clocks = <0x02 0x07>;

  565. 			status = "disabled";

  566. 			interrupts = <0x0d>;

  567. 			reg = <0x1e6a3000 0x100>;

  568. 			pinctrl-0 = <0x06>;

  569. 			pinctrl-names = "default";

  570. 		};

  571. 

  572. 		apb {

  573. 			compatible = "simple-bus";

  574. 			ranges;

  575. 			#address-cells = <0x01>;

  576. 			#size-cells = <0x01>;

  577. 

  578. 			syscon@1e6e2000 {

  579. 				compatible = "aspeed,ast2500-scu\0syscon\0simple-mfd";

  580. 				#reset-cells = <0x01>;

  581. 				#address-cells = <0x01>;

  582. 				#size-cells = <0x00>;

  583. 				#clock-cells = <0x01>;

  584. 				phandle = <0x02>;

  585. 				reg = <0x1e6e2000 0x1a8>;

  586. 

  587. 				scratch {

  588. 					compatible = "aspeed,bmc-misc";

  589. 

  590. 					dvo_mux {

  591. 						offset = <0x2c>;

  592. 						bit-mask = <0x01>;

  593. 						bit-shift = <0x12>;

  594. 					};

  595. 

  596. 					vga6 {

  597. 						offset = <0x68>;

  598. 						bit-mask = <0xffffffff>;

  599. 						bit-shift = <0x00>;

  600. 					};

  601. 

  602. 					vga4 {

  603. 						offset = <0x60>;

  604. 						bit-mask = <0xffffffff>;

  605. 						bit-shift = <0x00>;

  606. 					};

  607. 

  608. 					vga2 {

  609. 						offset = <0x58>;

  610. 						bit-mask = <0xffffffff>;

  611. 						bit-shift = <0x00>;

  612. 					};

  613. 

  614. 					vga0 {

  615. 						offset = <0x50>;

  616. 						bit-mask = <0xffffffff>;

  617. 						bit-shift = <0x00>;

  618. 					};

  619. 

  620. 					vga7 {

  621. 						offset = <0x6c>;

  622. 						bit-mask = <0xffffffff>;

  623. 						bit-shift = <0x00>;

  624. 					};

  625. 

  626. 					vga5 {

  627. 						offset = <0x64>;

  628. 						bit-mask = <0xffffffff>;

  629. 						bit-shift = <0x00>;

  630. 					};

  631. 

  632. 					vga3 {

  633. 						offset = <0x5c>;

  634. 						bit-mask = <0xffffffff>;

  635. 						bit-shift = <0x00>;

  636. 					};

  637. 

  638. 					vga1 {

  639. 						offset = <0x54>;

  640. 						bit-mask = <0xffffffff>;

  641. 						bit-shift = <0x00>;

  642. 					};

  643. 

  644. 					dac_mux {

  645. 						offset = <0x2c>;

  646. 						bit-mask = <0x03>;

  647. 						bit-shift = <0x10>;

  648. 					};

  649. 				};

  650. 

  651. 				pinctrl {

  652. 					compatible = "aspeed,g5-pinctrl";

  653. 					aspeed,external-nodes = <0x08 0x09>;

  654. 					phandle = <0x0d>;

  655. 

  656. 					rgmii2_default {

  657. 						groups = "RGMII2";

  658. 						function = "RGMII2";

  659. 					};

  660. 

  661. 					vpo_default {

  662. 						phandle = <0x0a>;

  663. 						groups = "VPO";

  664. 						function = "VPO";

  665. 					};

  666. 

  667. 					lpcplus_default {

  668. 						groups = "LPCPLUS";

  669. 						function = "LPCPLUS";

  670. 					};

  671. 

  672. 					ndtr3_default {

  673. 						groups = "NDTR3";

  674. 						function = "NDTR3";

  675. 					};

  676. 

  677. 					nrts2_default {

  678. 						groups = "NRTS2";

  679. 						function = "NRTS2";

  680. 					};

  681. 

  682. 					adc4_default {

  683. 						groups = "ADC4";

  684. 						function = "ADC4";

  685. 					};

  686. 

  687. 					i2c4_default {

  688. 						phandle = <0x1d>;

  689. 						groups = "I2C4";

  690. 						function = "I2C4";

  691. 					};

  692. 

  693. 					ndsr1_default {

  694. 						phandle = <0x13>;

  695. 						groups = "NDSR1";

  696. 						function = "NDSR1";

  697. 					};

  698. 

  699. 					salt2_default {

  700. 						groups = "SALT2";

  701. 						function = "SALT2";

  702. 					};

  703. 

  704. 					nri2_default {

  705. 						groups = "NRI2";

  706. 						function = "NRI2";

  707. 					};

  708. 

  709. 					gpid0_default {

  710. 						groups = "GPID0";

  711. 						function = "GPID0";

  712. 					};

  713. 

  714. 					lad3_default {

  715. 						groups = "LAD3";

  716. 						function = "LAD3";

  717. 					};

  718. 

  719. 					pwm3_default {

  720. 						groups = "PWM3";

  721. 						function = "PWM3";

  722. 					};

  723. 

  724. 					fwspics2_default {

  725. 						groups = "FWSPICS2";

  726. 						function = "FWSPICS2";

  727. 					};

  728. 

  729. 					mac2link_default {

  730. 						groups = "MAC2LINK";

  731. 						function = "MAC2LINK";

  732. 					};

  733. 

  734. 					rxd3_default {

  735. 						groups = "RXD3";

  736. 						function = "RXD3";

  737. 					};

  738. 

  739. 					usbcki_default {

  740. 						groups = "USBCKI";

  741. 						function = "USBCKI";

  742. 					};

  743. 

  744. 					ncts3_default {

  745. 						groups = "NCTS3";

  746. 						function = "NCTS3";

  747. 					};

  748. 

  749. 					adc15_default {

  750. 						groups = "ADC15";

  751. 						function = "ADC15";

  752. 					};

  753. 

  754. 					vgavs_default {

  755. 						groups = "VGAVS";

  756. 						function = "VGAVS";

  757. 					};

  758. 

  759. 					adc1_default {

  760. 						groups = "ADC1";

  761. 						function = "ADC1";

  762. 					};

  763. 

  764. 					siopbi_default {

  765. 						groups = "SIOPBI";

  766. 						function = "SIOPBI";

  767. 					};

  768. 

  769. 					salt9_default {

  770. 						groups = "SALT9";

  771. 						function = "SALT9";

  772. 					};

  773. 

  774. 					timer6_default {

  775. 						groups = "TIMER6";

  776. 						function = "TIMER6";

  777. 					};

  778. 

  779. 					ddcdat_default {

  780. 						groups = "DDCDAT";

  781. 						function = "DDCDAT";

  782. 					};

  783. 

  784. 					gpie6_default {

  785. 						groups = "GPIE6";

  786. 						function = "GPIE6";

  787. 					};

  788. 

  789. 					ndcd2_default {

  790. 						groups = "NDCD2";

  791. 						function = "NDCD2";

  792. 					};

  793. 

  794. 					lad0_default {

  795. 						groups = "LAD0";

  796. 						function = "LAD0";

  797. 					};

  798. 

  799. 					spi1_default {

  800. 						phandle = <0x03>;

  801. 						groups = "SPI1";

  802. 						function = "SPI1";

  803. 					};

  804. 

  805. 					pwm0_default {

  806. 						phandle = <0x17>;

  807. 						groups = "PWM0";

  808. 						function = "PWM0";

  809. 					};

  810. 

  811. 					txd2_default {

  812. 						groups = "TXD2";

  813. 						function = "TXD2";

  814. 					};

  815. 

  816. 					wdtrst1_default {

  817. 						groups = "WDTRST1";

  818. 						function = "WDTRST1";

  819. 					};

  820. 

  821. 					adc12_default {

  822. 						groups = "ADC12";

  823. 						function = "ADC12";

  824. 					};

  825. 

  826. 					i2c12_default {

  827. 						phandle = <0x25>;

  828. 						groups = "I2C12";

  829. 						function = "I2C12";

  830. 					};

  831. 

  832. 					adc8_default {

  833. 						groups = "ADC8";

  834. 						function = "ADC8";

  835. 					};

  836. 

  837. 					i2c8_default {

  838. 						phandle = <0x21>;

  839. 						groups = "I2C8";

  840. 						function = "I2C8";

  841. 					};

  842. 

  843. 					salt13_default {

  844. 						groups = "SALT13";

  845. 						function = "SALT13";

  846. 					};

  847. 

  848. 					salt6_default {

  849. 						groups = "SALT6";

  850. 						function = "SALT6";

  851. 					};

  852. 

  853. 					timer3_default {

  854. 						groups = "TIMER3";

  855. 						function = "TIMER3";

  856. 					};

  857. 

  858. 					usb11bhid_default {

  859. 						groups = "USB11BHID";

  860. 						function = "USB11BHID";

  861. 					};

  862. 

  863. 					lpcsmi_default {

  864. 						groups = "LPCSMI";

  865. 						function = "LPCSMI";

  866. 					};

  867. 

  868. 					lpcpd_default {

  869. 						groups = "LPCPD";

  870. 						function = "LPCPD";

  871. 					};

  872. 

  873. 					gpid4_default {

  874. 						groups = "GPID4";

  875. 						function = "GPID4";

  876. 					};

  877. 

  878. 					spi2mosi_default {

  879. 						groups = "SPI2MOSI";

  880. 						function = "SPI2MOSI";

  881. 					};

  882. 

  883. 					sgps2_default {

  884. 						groups = "SGPS2";

  885. 						function = "SGPS2";

  886. 					};

  887. 

  888. 					pwm7_default {

  889. 						groups = "PWM7";

  890. 						function = "PWM7";

  891. 					};

  892. 

  893. 					spi1debug_default {

  894. 						groups = "SPI1DEBUG";

  895. 						function = "SPI1DEBUG";

  896. 					};

  897. 

  898. 					scl1_default {

  899. 						groups = "SCL1";

  900. 						function = "SCL1";

  901. 					};

  902. 

  903. 					sda1_default {

  904. 						groups = "SDA1";

  905. 						function = "SDA1";

  906. 					};

  907. 

  908. 					ndtr4_default {

  909. 						groups = "NDTR4";

  910. 						function = "NDTR4";

  911. 					};

  912. 

  913. 					nrts3_default {

  914. 						groups = "NRTS3";

  915. 						function = "NRTS3";

  916. 					};

  917. 

  918. 					usb2ad_default {

  919. 						phandle = <0x07>;

  920. 						groups = "USB2AD";

  921. 						function = "USB2AD";

  922. 					};

  923. 

  924. 					siopwreq_default {

  925. 						groups = "SIOPWREQ";

  926. 						function = "SIOPWREQ";

  927. 					};

  928. 

  929. 					adc5_default {

  930. 						groups = "ADC5";

  931. 						function = "ADC5";

  932. 					};

  933. 

  934. 					i2c5_default {

  935. 						phandle = <0x1e>;

  936. 						groups = "I2C5";

  937. 						function = "I2C5";

  938. 					};

  939. 

  940. 					ndsr2_default {

  941. 						groups = "NDSR2";

  942. 						function = "NDSR2";

  943. 					};

  944. 

  945. 					lframe_default {

  946. 						groups = "LFRAME";

  947. 						function = "LFRAME";

  948. 					};

  949. 

  950. 					salt10_default {

  951. 						groups = "SALT10";

  952. 						function = "SALT10";

  953. 					};

  954. 

  955. 					salt3_default {

  956. 						groups = "SALT3";

  957. 						function = "SALT3";

  958. 					};

  959. 

  960. 					spi2cs0_default {

  961. 						groups = "SPI2CS0";

  962. 						function = "SPI2CS0";

  963. 					};

  964. 

  965. 					sioonctrl_default {

  966. 						groups = "SIOONCTRL";

  967. 						function = "SIOONCTRL";

  968. 					};

  969. 

  970. 					nri3_default {

  971. 						groups = "NRI3";

  972. 						function = "NRI3";

  973. 					};

  974. 

  975. 					mdio1_default {

  976. 						groups = "MDIO1";

  977. 						function = "MDIO1";

  978. 					};

  979. 

  980. 					ddcclk_default {

  981. 						groups = "DDCCLK";

  982. 						function = "DDCCLK";

  983. 					};

  984. 

  985. 					sios5_default {

  986. 						groups = "SIOS5";

  987. 						function = "SIOS5";

  988. 					};

  989. 

  990. 					gpie0_default {

  991. 						groups = "GPIE0";

  992. 						function = "GPIE0";

  993. 					};

  994. 

  995. 					pwm4_default {

  996. 						groups = "PWM4";

  997. 						function = "PWM4";

  998. 					};

  999. 

  1000. 					sd1_default {

  1001. 						groups = "SD1";

  1002. 						function = "SD1";

  1003. 					};

  1004. 

  1005. 					lclk_default {

  1006. 						groups = "LCLK";

  1007. 						function = "LCLK";

  1008. 					};

  1009. 

  1010. 					rxd4_default {

  1011. 						groups = "RXD4";

  1012. 						function = "RXD4";

  1013. 					};

  1014. 

  1015. 					ndtr1_default {

  1016. 						phandle = <0x12>;

  1017. 						groups = "NDTR1";

  1018. 						function = "NDTR1";

  1019. 					};

  1020. 

  1021. 					ncts4_default {

  1022. 						groups = "NCTS4";

  1023. 						function = "NCTS4";

  1024. 					};

  1025. 

  1026. 					adc2_default {

  1027. 						groups = "ADC2";

  1028. 						function = "ADC2";

  1029. 					};

  1030. 

  1031. 					vpi24_default {

  1032. 						groups = "VPI24";

  1033. 						function = "VPI24";

  1034. 					};

  1035. 

  1036. 					spi2ck_default {

  1037. 						groups = "SPI2CK";

  1038. 						function = "SPI2CK";

  1039. 					};

  1040. 

  1041. 					timer7_default {

  1042. 						groups = "TIMER7";

  1043. 						function = "TIMER7";

  1044. 					};

  1045. 

  1046. 					spi1cs1_default {

  1047. 						groups = "SPI1CS1";

  1048. 						function = "SPI1CS1";

  1049. 					};

  1050. 

  1051. 					bmcint_default {

  1052. 						groups = "BMCINT";

  1053. 						function = "BMCINT";

  1054. 					};

  1055. 

  1056. 					espi_default {

  1057. 						groups = "ESPI";

  1058. 						function = "ESPI";

  1059. 					};

  1060. 

  1061. 					ndcd3_default {

  1062. 						groups = "NDCD3";

  1063. 						function = "NDCD3";

  1064. 					};

  1065. 

  1066. 					lad1_default {

  1067. 						groups = "LAD1";

  1068. 						function = "LAD1";

  1069. 					};

  1070. 

  1071. 					pwm1_default {

  1072. 						phandle = <0x18>;

  1073. 						groups = "PWM1";

  1074. 						function = "PWM1";

  1075. 					};

  1076. 

  1077. 					rxd1_default {

  1078. 						phandle = <0x10>;

  1079. 						groups = "RXD1";

  1080. 						function = "RXD1";

  1081. 					};

  1082. 

  1083. 					txd3_default {

  1084. 						groups = "TXD3";

  1085. 						function = "TXD3";

  1086. 					};

  1087. 

  1088. 					rmii1_default {

  1089. 						phandle = <0x04>;

  1090. 						groups = "RMII1";

  1091. 						function = "RMII1";

  1092. 					};

  1093. 

  1094. 					wdtrst2_default {

  1095. 						groups = "WDTRST2";

  1096. 						function = "WDTRST2";

  1097. 					};

  1098. 

  1099. 					ncts1_default {

  1100. 						phandle = <0x14>;

  1101. 						groups = "NCTS1";

  1102. 						function = "NCTS1";

  1103. 					};

  1104. 

  1105. 					adc13_default {

  1106. 						groups = "ADC13";

  1107. 						function = "ADC13";

  1108. 					};

  1109. 

  1110. 					i2c13_default {

  1111. 						phandle = <0x26>;

  1112. 						groups = "I2C13";

  1113. 						function = "I2C13";

  1114. 					};

  1115. 

  1116. 					usb2ah_default {

  1117. 						phandle = <0x05>;

  1118. 						groups = "USB2AH";

  1119. 						function = "USB2AH";

  1120. 					};

  1121. 

  1122. 					pewake_default {

  1123. 						groups = "PEWAKE";

  1124. 						function = "PEWAKE";

  1125. 					};

  1126. 

  1127. 					adc9_default {

  1128. 						groups = "ADC9";

  1129. 						function = "ADC9";

  1130. 					};

  1131. 

  1132. 					i2c9_default {

  1133. 						phandle = <0x22>;

  1134. 						groups = "I2C9";

  1135. 						function = "I2C9";

  1136. 					};

  1137. 

  1138. 					salt14_default {

  1139. 						groups = "SALT14";

  1140. 						function = "SALT14";

  1141. 					};

  1142. 

  1143. 					salt7_default {

  1144. 						groups = "SALT7";

  1145. 						function = "SALT7";

  1146. 					};

  1147. 

  1148. 					timer4_default {

  1149. 						groups = "TIMER4";

  1150. 						function = "TIMER4";

  1151. 					};

  1152. 

  1153. 					gpie4_default {

  1154. 						groups = "GPIE4";

  1155. 						function = "GPIE4";

  1156. 					};

  1157. 

  1158. 					vgabiosrom_default {

  1159. 						groups = "VGABIOSROM";

  1160. 						function = "VGABIOSROM";

  1161. 					};

  1162. 

  1163. 					lpchc_default {

  1164. 						groups = "LPCHC";

  1165. 						function = "LPCHC";

  1166. 					};

  1167. 

  1168. 					siosci_default {

  1169. 						groups = "SIOSCI";

  1170. 						function = "SIOSCI";

  1171. 					};

  1172. 

  1173. 					scl2_default {

  1174. 						groups = "SCL2";

  1175. 						function = "SCL2";

  1176. 					};

  1177. 

  1178. 					sda2_default {

  1179. 						groups = "SDA2";

  1180. 						function = "SDA2";

  1181. 					};

  1182. 

  1183. 					adc10_default {

  1184. 						groups = "ADC10";

  1185. 						function = "ADC10";

  1186. 					};

  1187. 

  1188. 					i2c10_default {

  1189. 						phandle = <0x23>;

  1190. 						groups = "I2C10";

  1191. 						function = "I2C10";

  1192. 					};

  1193. 

  1194. 					nrts4_default {

  1195. 						groups = "NRTS4";

  1196. 						function = "NRTS4";

  1197. 					};

  1198. 

  1199. 					adc6_default {

  1200. 						groups = "ADC6";

  1201. 						function = "ADC6";

  1202. 					};

  1203. 

  1204. 					i2c6_default {

  1205. 						phandle = <0x1f>;

  1206. 						groups = "I2C6";

  1207. 						function = "I2C6";

  1208. 					};

  1209. 

  1210. 					ndsr3_default {

  1211. 						groups = "NDSR3";

  1212. 						function = "NDSR3";

  1213. 					};

  1214. 

  1215. 					spi1passthru_default {

  1216. 						groups = "SPI1PASSTHRU";

  1217. 						function = "SPI1PASSTHRU";

  1218. 					};

  1219. 

  1220. 					salt11_default {

  1221. 						groups = "SALT11";

  1222. 						function = "SALT11";

  1223. 					};

  1224. 

  1225. 					salt4_default {

  1226. 						groups = "SALT4";

  1227. 						function = "SALT4";

  1228. 					};

  1229. 

  1230. 					spi2cs1_default {

  1231. 						groups = "SPI2CS1";

  1232. 						function = "SPI2CS1";

  1233. 					};

  1234. 

  1235. 					nri4_default {

  1236. 						groups = "NRI4";

  1237. 						function = "NRI4";

  1238. 					};

  1239. 

  1240. 					mdio2_default {

  1241. 						groups = "MDIO2";

  1242. 						function = "MDIO2";

  1243. 					};

  1244. 

  1245. 					gpid2_default {

  1246. 						groups = "GPID2";

  1247. 						function = "GPID2";

  1248. 					};

  1249. 

  1250. 					pwm5_default {

  1251. 						groups = "PWM5";

  1252. 						function = "PWM5";

  1253. 					};

  1254. 

  1255. 					sd2_default {

  1256. 						groups = "SD2";

  1257. 						function = "SD2";

  1258. 					};

  1259. 

  1260. 					rgmii1_default {

  1261. 						groups = "RGMII1";

  1262. 						function = "RGMII1";

  1263. 					};

  1264. 

  1265. 					pnor_default {

  1266. 						groups = "PNOR";

  1267. 						function = "PNOR";

  1268. 					};

  1269. 

  1270. 					ndtr2_default {

  1271. 						groups = "NDTR2";

  1272. 						function = "NDTR2";

  1273. 					};

  1274. 

  1275. 					acpi_default {

  1276. 						groups = "ACPI";

  1277. 						function = "ACPI";

  1278. 					};

  1279. 

  1280. 					nrts1_default {

  1281. 						phandle = <0x11>;

  1282. 						groups = "NRTS1";

  1283. 						function = "NRTS1";

  1284. 					};

  1285. 

  1286. 					adc3_default {

  1287. 						groups = "ADC3";

  1288. 						function = "ADC3";

  1289. 					};

  1290. 

  1291. 					i2c3_default {

  1292. 						phandle = <0x1c>;

  1293. 						groups = "I2C3";

  1294. 						function = "I2C3";

  1295. 					};

  1296. 

  1297. 					salt1_default {

  1298. 						groups = "SALT1";

  1299. 						function = "SALT1";

  1300. 					};

  1301. 

  1302. 					lsirq_default {

  1303. 						groups = "LSIRQ";

  1304. 						function = "LSIRQ";

  1305. 					};

  1306. 

  1307. 					timer8_default {

  1308. 						groups = "TIMER8";

  1309. 						function = "TIMER8";

  1310. 					};

  1311. 

  1312. 					nri1_default {

  1313. 						phandle = <0x16>;

  1314. 						groups = "NRI1";

  1315. 						function = "NRI1";

  1316. 					};

  1317. 

  1318. 					uart6_default {

  1319. 						groups = "UART6";

  1320. 						function = "UART6";

  1321. 					};

  1322. 

  1323. 					sios3_default {

  1324. 						groups = "SIOS3";

  1325. 						function = "SIOS3";

  1326. 					};

  1327. 

  1328. 					ndcd4_default {

  1329. 						groups = "NDCD4";

  1330. 						function = "NDCD4";

  1331. 					};

  1332. 

  1333. 					lad2_default {

  1334. 						groups = "LAD2";

  1335. 						function = "LAD2";

  1336. 					};

  1337. 

  1338. 					spi2miso_default {

  1339. 						groups = "SPI2MISO";

  1340. 						function = "SPI2MISO";

  1341. 					};

  1342. 

  1343. 					pwm2_default {

  1344. 						groups = "PWM2";

  1345. 						function = "PWM2";

  1346. 					};

  1347. 

  1348. 					fwspics1_default {

  1349. 						groups = "FWSPICS1";

  1350. 						function = "FWSPICS1";

  1351. 					};

  1352. 

  1353. 					oscclk_default {

  1354. 						groups = "OSCCLK";

  1355. 						function = "OSCCLK";

  1356. 					};

  1357. 

  1358. 					rxd2_default {

  1359. 						groups = "RXD2";

  1360. 						function = "RXD2";

  1361. 					};

  1362. 

  1363. 					txd4_default {

  1364. 						groups = "TXD4";

  1365. 						function = "TXD4";

  1366. 					};

  1367. 

  1368. 					rmii2_default {

  1369. 						groups = "RMII2";

  1370. 						function = "RMII2";

  1371. 					};

  1372. 

  1373. 					ncts2_default {

  1374. 						groups = "NCTS2";

  1375. 						function = "NCTS2";

  1376. 					};

  1377. 

  1378. 					adc14_default {

  1379. 						groups = "ADC14";

  1380. 						function = "ADC14";

  1381. 					};

  1382. 

  1383. 					i2c14_default {

  1384. 						phandle = <0x27>;

  1385. 						groups = "I2C14";

  1386. 						function = "I2C14";

  1387. 					};

  1388. 

  1389. 					adc0_default {

  1390. 						groups = "ADC0";

  1391. 						function = "ADC0";

  1392. 					};

  1393. 

  1394. 					usb2bh_default {

  1395. 						phandle = <0x06>;

  1396. 						groups = "USB2BH";

  1397. 						function = "USB2BH";

  1398. 					};

  1399. 

  1400. 					salt8_default {

  1401. 						groups = "SALT8";

  1402. 						function = "SALT8";

  1403. 					};

  1404. 

  1405. 					timer5_default {

  1406. 						groups = "TIMER5";

  1407. 						function = "TIMER5";

  1408. 					};

  1409. 

  1410. 					gpid6_default {

  1411. 						groups = "GPID6";

  1412. 						function = "GPID6";

  1413. 					};

  1414. 

  1415. 					ndcd1_default {

  1416. 						phandle = <0x15>;

  1417. 						groups = "NDCD1";

  1418. 						function = "NDCD1";

  1419. 					};

  1420. 

  1421. 					lpcpme_default {

  1422. 						groups = "LPCPME";

  1423. 						function = "LPCPME";

  1424. 					};

  1425. 

  1426. 					mac1link_default {

  1427. 						groups = "MAC1LINK";

  1428. 						function = "MAC1LINK";

  1429. 					};

  1430. 

  1431. 					txd1_default {

  1432. 						phandle = <0x0f>;

  1433. 						groups = "TXD1";

  1434. 						function = "TXD1";

  1435. 					};

  1436. 

  1437. 					adc11_default {

  1438. 						groups = "ADC11";

  1439. 						function = "ADC11";

  1440. 					};

  1441. 

  1442. 					i2c11_default {

  1443. 						phandle = <0x24>;

  1444. 						groups = "I2C11";

  1445. 						function = "I2C11";

  1446. 					};

  1447. 

  1448. 					vgahs_default {

  1449. 						groups = "VGAHS";

  1450. 						function = "VGAHS";

  1451. 					};

  1452. 

  1453. 					adc7_default {

  1454. 						groups = "ADC7";

  1455. 						function = "ADC7";

  1456. 					};

  1457. 

  1458. 					i2c7_default {

  1459. 						phandle = <0x20>;

  1460. 						groups = "I2C7";

  1461. 						function = "I2C7";

  1462. 					};

  1463. 

  1464. 					ndsr4_default {

  1465. 						groups = "NDSR4";

  1466. 						function = "NDSR4";

  1467. 					};

  1468. 

  1469. 					salt12_default {

  1470. 						groups = "SALT12";

  1471. 						function = "SALT12";

  1472. 					};

  1473. 

  1474. 					salt5_default {

  1475. 						groups = "SALT5";

  1476. 						function = "SALT5";

  1477. 					};

  1478. 

  1479. 					siopbo_default {

  1480. 						groups = "SIOPBO";

  1481. 						function = "SIOPBO";

  1482. 					};

  1483. 

  1484. 					siopwrgd_default {

  1485. 						groups = "SIOPWRGD";

  1486. 						function = "SIOPWRGD";

  1487. 					};

  1488. 

  1489. 					gpie2_default {

  1490. 						groups = "GPIE2";

  1491. 						function = "GPIE2";

  1492. 					};

  1493. 

  1494. 					lpcrst_default {

  1495. 						groups = "LPCRST";

  1496. 						function = "LPCRST";

  1497. 					};

  1498. 

  1499. 					sgps1_default {

  1500. 						groups = "SGPS1";

  1501. 						function = "SGPS1";

  1502. 					};

  1503. 

  1504. 					pwm6_default {

  1505. 						groups = "PWM6";

  1506. 						function = "PWM6";

  1507. 					};

  1508. 				};

  1509. 			};

  1510. 

  1511. 			watchdog@1e785020 {

  1512. 				compatible = "aspeed,ast2500-wdt";

  1513. 				clocks = <0x02 0x1a>;

  1514. 				reg = <0x1e785020 0x20>;

  1515. 			};

  1516. 

  1517. 			watchdog@1e785000 {

  1518. 				compatible = "aspeed,ast2500-wdt";

  1519. 				clocks = <0x02 0x1a>;

  1520. 				reg = <0x1e785000 0x20>;

  1521. 			};

  1522. 

  1523. 			serial@1e78d000 {

  1524. 				compatible = "ns16550a";

  1525. 				clocks = <0x02 0x0e>;

  1526. 				resets = <0x0e 0x05>;

  1527. 				status = "disabled";

  1528. 				interrupts = <0x20>;

  1529. 				reg = <0x1e78d000 0x20>;

  1530. 				reg-shift = <0x02>;

  1531. 				no-loopback-test;

  1532. 			};

  1533. 

  1534. 			sram@1e720000 {

  1535. 				compatible = "mmio-sram";

  1536. 				phandle = <0x2a>;

  1537. 				reg = <0x1e720000 0x9000>;

  1538. 			};

  1539. 

  1540. 			display@1e6e6000 {

  1541. 				reg-io-width = <0x04>;

  1542. 				compatible = "aspeed,ast2500-gfx\0syscon";

  1543. 				clocks = <0x02 0x0a>;

  1544. 				resets = <0x02 0x09>;

  1545. 				status = "okay";

  1546. 				interrupts = <0x19>;

  1547. 				memory-region = <0x0b>;

  1548. 				phandle = <0x08>;

  1549. 				reg = <0x1e6e6000 0x1000>;

  1550. 				pinctrl-0 = <0x0a>;

  1551. 				output-dvo;

  1552. 				pinctrl-names = "default";

  1553. 			};

  1554. 

  1555. 			serial@1e787000 {

  1556. 				compatible = "aspeed,ast2500-vuart";

  1557. 				clocks = <0x02 0x1a>;

  1558. 				status = "okay";

  1559. 				interrupts = <0x08>;

  1560. 				reg = <0x1e787000 0x40>;

  1561. 				reg-shift = <0x02>;

  1562. 				no-loopback-test;

  1563. 			};

  1564. 

  1565. 			serial@1e784000 {

  1566. 				compatible = "ns16550a";

  1567. 				clocks = <0x02 0x0f>;

  1568. 				status = "okay";

  1569. 				interrupts = <0x0a>;

  1570. 				reg = <0x1e784000 0x20>;

  1571. 				reg-shift = <0x02>;

  1572. 				no-loopback-test;

  1573. 			};

  1574. 

  1575. 			bus@1e78b000 {

  1576. 				compatible = "simple-bus";

  1577. 				ranges = <0x00 0x1e78b000 0x60>;

  1578. 				#address-cells = <0x01>;

  1579. 				#size-cells = <0x01>;

  1580. 

  1581. 				peci-bus@0 {

  1582. 					rd-sampling-point = <0x08>;

  1583. 					compatible = "aspeed,ast2500-peci";

  1584. 					clocks = <0x02 0x06>;

  1585. 					resets = <0x02 0x06>;

  1586. 					status = "disabled";

  1587. 					addr-timing = <0x01>;

  1588. 					#address-cells = <0x01>;

  1589. 					interrupts = <0x0f>;

  1590. 					#size-cells = <0x00>;

  1591. 					reg = <0x00 0x60>;

  1592. 					clock-frequency = <0x16e3600>;

  1593. 					cmd-timeout-ms = <0x3e8>;

  1594. 					msg-timing = <0x01>;

  1595. 				};

  1596. 			};

  1597. 

  1598. 			lpc@1e789000 {

  1599. 				compatible = "aspeed,ast2500-lpc\0simple-mfd";

  1600. 				ranges = <0x00 0x1e789000 0x1000>;

  1601. 				#address-cells = <0x01>;

  1602. 				#size-cells = <0x01>;

  1603. 				reg = <0x1e789000 0x1000>;

  1604. 

  1605. 				lpc-host@80 {

  1606. 					reg-io-width = <0x04>;

  1607. 					compatible = "aspeed,ast2500-lpc-host\0simple-mfd\0syscon";

  1608. 					ranges = <0x00 0x80 0x1e0>;

  1609. 					#address-cells = <0x01>;

  1610. 					#size-cells = <0x01>;

  1611. 					reg = <0x80 0x1e0>;

  1612. 

  1613. 					regs {

  1614. 						compatible = "aspeed,bmc-misc";

  1615. 

  1616. 						sio_27 {

  1617. 							offset = <0xfc>;

  1618. 							bit-mask = <0xff>;

  1619. 							bit-shift = <0x18>;

  1620. 						};

  1621. 

  1622. 						sio_2e {

  1623. 							offset = <0xf4>;

  1624. 							bit-mask = <0xff>;

  1625. 							bit-shift = <0x10>;

  1626. 						};

  1627. 

  1628. 						sio_25 {

  1629. 							offset = <0xfc>;

  1630. 							bit-mask = <0xff>;

  1631. 							bit-shift = <0x08>;

  1632. 						};

  1633. 

  1634. 						sio_2c {

  1635. 							offset = <0xf4>;

  1636. 							bit-mask = <0xff>;

  1637. 							bit-shift = <0x00>;

  1638. 						};

  1639. 

  1640. 						sio_23 {

  1641. 							offset = <0xf8>;

  1642. 							bit-mask = <0xff>;

  1643. 							bit-shift = <0x18>;

  1644. 						};

  1645. 

  1646. 						sio_2a {

  1647. 							offset = <0xf0>;

  1648. 							bit-mask = <0xff>;

  1649. 							bit-shift = <0x10>;

  1650. 						};

  1651. 

  1652. 						sio_21 {

  1653. 							offset = <0xf8>;

  1654. 							bit-mask = <0xff>;

  1655. 							bit-shift = <0x08>;

  1656. 						};

  1657. 

  1658. 						sio_28 {

  1659. 							offset = <0xf0>;

  1660. 							bit-mask = <0xff>;

  1661. 							bit-shift = <0x00>;

  1662. 						};

  1663. 

  1664. 						sio_2f {

  1665. 							offset = <0xf4>;

  1666. 							bit-mask = <0xff>;

  1667. 							bit-shift = <0x18>;

  1668. 						};

  1669. 

  1670. 						sio_26 {

  1671. 							offset = <0xfc>;

  1672. 							bit-mask = <0xff>;

  1673. 							bit-shift = <0x10>;

  1674. 						};

  1675. 

  1676. 						sio_2d {

  1677. 							offset = <0xf4>;

  1678. 							bit-mask = <0xff>;

  1679. 							bit-shift = <0x08>;

  1680. 						};

  1681. 

  1682. 						sio_24 {

  1683. 							offset = <0xfc>;

  1684. 							bit-mask = <0xff>;

  1685. 							bit-shift = <0x00>;

  1686. 						};

  1687. 

  1688. 						sio_2b {

  1689. 							offset = <0xf0>;

  1690. 							bit-mask = <0xff>;

  1691. 							bit-shift = <0x18>;

  1692. 						};

  1693. 

  1694. 						sio_22 {

  1695. 							offset = <0xf8>;

  1696. 							bit-mask = <0xff>;

  1697. 							bit-shift = <0x10>;

  1698. 						};

  1699. 

  1700. 						sio_20 {

  1701. 							offset = <0xf8>;

  1702. 							bit-mask = <0xff>;

  1703. 							bit-shift = <0x00>;

  1704. 						};

  1705. 

  1706. 						sio_29 {

  1707. 							offset = <0xf0>;

  1708. 							bit-mask = <0xff>;

  1709. 							bit-shift = <0x08>;

  1710. 						};

  1711. 					};

  1712. 

  1713. 					lpc-ctrl@0 {

  1714. 						compatible = "aspeed,ast2500-lpc-ctrl";

  1715. 						clocks = <0x02 0x08>;

  1716. 						status = "okay";

  1717. 						memory-region = <0x19>;

  1718. 						reg = <0x00 0x80>;

  1719. 						flash = <0x1a>;

  1720. 					};

  1721. 

  1722. 					lhc@20 {

  1723. 						compatible = "aspeed,ast2500-lhc";

  1724. 						phandle = <0x09>;

  1725. 						reg = <0x20 0x24 0x48 0x08>;

  1726. 					};

  1727. 

  1728. 					kcs4@0 {

  1729. 						compatible = "aspeed,ast2500-kcs-bmc";

  1730. 						status = "disabled";

  1731. 						interrupts = <0x08>;

  1732. 						kcs_chan = <0x04>;

  1733. 					};

  1734. 

  1735. 					mbox@180 {

  1736. 						compatible = "aspeed,ast2500-mbox";

  1737. 						#mbox-cells = <0x01>;

  1738. 						status = "okay";

  1739. 						interrupts = <0x2e>;

  1740. 						reg = <0x180 0x5c>;

  1741. 					};

  1742. 

  1743. 					reset-controller@18 {

  1744. 						compatible = "aspeed,ast2500-lpc-reset";

  1745. 						#reset-cells = <0x01>;

  1746. 						phandle = <0x0e>;

  1747. 						reg = <0x18 0x04>;

  1748. 					};

  1749. 

  1750. 					lpc-snoop@0 {

  1751. 						compatible = "aspeed,ast2500-lpc-snoop";

  1752. 						status = "okay";

  1753. 						interrupts = <0x08>;

  1754. 						reg = <0x00 0x80>;

  1755. 						snoop-ports = <0x81 0x82>;

  1756. 					};

  1757. 

  1758. 					ibt@c0 {

  1759. 						compatible = "aspeed,ast2500-ibt-bmc";

  1760. 						status = "okay";

  1761. 						interrupts = <0x08>;

  1762. 						reg = <0xc0 0x18>;

  1763. 					};

  1764. 				};

  1765. 

  1766. 				lpc-bmc@0 {

  1767. 					reg-io-width = <0x04>;

  1768. 					compatible = "aspeed,ast2500-lpc-bmc\0simple-mfd\0syscon";

  1769. 					ranges = <0x00 0x00 0x80>;

  1770. 					#address-cells = <0x01>;

  1771. 					#size-cells = <0x01>;

  1772. 					reg = <0x00 0x80>;

  1773. 

  1774. 					kcs1@0 {

  1775. 						compatible = "aspeed,ast2500-kcs-bmc";

  1776. 						status = "disabled";

  1777. 						interrupts = <0x08>;

  1778. 						kcs_chan = <0x01>;

  1779. 					};

  1780. 

  1781. 					kcs3@0 {

  1782. 						compatible = "aspeed,ast2500-kcs-bmc";

  1783. 						status = "disabled";

  1784. 						interrupts = <0x08>;

  1785. 						kcs_chan = <0x03>;

  1786. 					};

  1787. 

  1788. 					kcs2@0 {

  1789. 						compatible = "aspeed,ast2500-kcs-bmc";

  1790. 						status = "disabled";

  1791. 						interrupts = <0x08>;

  1792. 						kcs_chan = <0x02>;

  1793. 					};

  1794. 				};

  1795. 			};

  1796. 

  1797. 			gpio@1e780000 {

  1798. 				compatible = "aspeed,ast2500-gpio";

  1799. 				clocks = <0x02 0x1a>;

  1800. 				gpio-controller;

  1801. 				gpio-ranges = <0x0d 0x00 0x00 0xdc>;

  1802. 				#interrupt-cells = <0x02>;

  1803. 				interrupts = <0x14>;

  1804. 				phandle = <0x28>;

  1805. 				reg = <0x1e780000 0x1000>;

  1806. 				#gpio-cells = <0x02>;

  1807. 				interrupt-controller;

  1808. 

  1809. 				nic_func_mode0 {

  1810. 					gpios = <0x1b 0x00>;

  1811. 					output-low;

  1812. 					gpio-hog;

  1813. 					line-name = "nic_func_mode0";

  1814. 				};

  1815. 

  1816. 				nic_func_mode1 {

  1817. 					gpios = <0x1c 0x00>;

  1818. 					output-low;

  1819. 					gpio-hog;

  1820. 					line-name = "nic_func_mode1";

  1821. 				};

  1822. 			};

  1823. 

  1824. 			serial@1e78f000 {

  1825. 				compatible = "ns16550a";

  1826. 				clocks = <0x02 0x15>;

  1827. 				resets = <0x0e 0x07>;

  1828. 				status = "disabled";

  1829. 				interrupts = <0x22>;

  1830. 				reg = <0x1e78f000 0x20>;

  1831. 				reg-shift = <0x02>;

  1832. 				no-loopback-test;

  1833. 			};

  1834. 

  1835. 			adc@1e6e9000 {

  1836. 				compatible = "aspeed,ast2500-adc";

  1837. 				clocks = <0x02 0x1a>;

  1838. 				resets = <0x02 0x02>;

  1839. 				#io-channel-cells = <0x01>;

  1840. 				status = "okay";

  1841. 				phandle = <0x2c>;

  1842. 				reg = <0x1e6e9000 0xb0>;

  1843. 			};

  1844. 

  1845. 			timer@1e782000 {

  1846. 				compatible = "aspeed,ast2400-timer";

  1847. 				clocks = <0x02 0x1a>;

  1848. 				clock-names = "PCLK";

  1849. 				interrupts = <0x10 0x11 0x12 0x23 0x24 0x25 0x26 0x27>;

  1850. 				reg = <0x1e782000 0x90>;

  1851. 			};

  1852. 

  1853. 			hwrng@1e6e2078 {

  1854. 				quality = <0x64>;

  1855. 				compatible = "timeriomem_rng";

  1856. 				period = <0x01>;

  1857. 				reg = <0x1e6e2078 0x04>;

  1858. 			};

  1859. 

  1860. 			serial@1e783000 {

  1861. 				compatible = "ns16550a";

  1862. 				clocks = <0x02 0x0d>;

  1863. 				resets = <0x0e 0x04>;

  1864. 				status = "okay";

  1865. 				interrupts = <0x09>;

  1866. 				reg = <0x1e783000 0x20>;

  1867. 				pinctrl-0 = <0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16>;

  1868. 				reg-shift = <0x02>;

  1869. 				no-loopback-test;

  1870. 				pinctrl-names = "default";

  1871. 			};

  1872. 

  1873. 			bus@1e78a000 {

  1874. 				compatible = "simple-bus";

  1875. 				ranges = <0x00 0x1e78a000 0x1000>;

  1876. 				#address-cells = <0x01>;

  1877. 				#size-cells = <0x01>;

  1878. 

  1879. 				i2c-bus@340 {

  1880. 					bus-frequency = <0x186a0>;

  1881. 					compatible = "aspeed,ast2500-i2c-bus";

  1882. 					clocks = <0x02 0x1a>;

  1883. 					resets = <0x02 0x07>;

  1884. 					status = "disabled";

  1885. 					#interrupt-cells = <0x01>;

  1886. 					interrupt-parent = <0x1b>;

  1887. 					#address-cells = <0x01>;

  1888. 					interrupts = <0x08>;

  1889. 					#size-cells = <0x00>;

  1890. 					reg = <0x340 0x40>;

  1891. 					pinctrl-0 = <0x22>;

  1892. 					pinctrl-names = "default";

  1893. 				};

  1894. 

  1895. 				i2c-bus@3c0 {

  1896. 					bus-frequency = <0x186a0>;

  1897. 					compatible = "aspeed,ast2500-i2c-bus";

  1898. 					clocks = <0x02 0x1a>;

  1899. 					resets = <0x02 0x07>;

  1900. 					status = "disabled";

  1901. 					#interrupt-cells = <0x01>;

  1902. 					interrupt-parent = <0x1b>;

  1903. 					#address-cells = <0x01>;

  1904. 					interrupts = <0x0a>;

  1905. 					#size-cells = <0x00>;

  1906. 					reg = <0x3c0 0x40>;

  1907. 					pinctrl-0 = <0x24>;

  1908. 					pinctrl-names = "default";

  1909. 				};

  1910. 

  1911. 				i2c-bus@300 {

  1912. 					bus-frequency = <0x186a0>;

  1913. 					compatible = "aspeed,ast2500-i2c-bus";

  1914. 					clocks = <0x02 0x1a>;

  1915. 					resets = <0x02 0x07>;

  1916. 					status = "okay";

  1917. 					#interrupt-cells = <0x01>;

  1918. 					interrupt-parent = <0x1b>;

  1919. 					#address-cells = <0x01>;

  1920. 					interrupts = <0x07>;

  1921. 					#size-cells = <0x00>;

  1922. 					reg = <0x300 0x40>;

  1923. 					pinctrl-0 = <0x21>;

  1924. 					pinctrl-names = "default";

  1925. 				};

  1926. 

  1927. 				interrupt-controller@0 {

  1928. 					compatible = "aspeed,ast2500-i2c-ic";

  1929. 					#interrupt-cells = <0x01>;

  1930. 					interrupts = <0x0c>;

  1931. 					phandle = <0x1b>;

  1932. 					reg = <0x00 0x40>;

  1933. 					interrupt-controller;

  1934. 				};

  1935. 

  1936. 				i2c-bus@180 {

  1937. 					bus-frequency = <0x186a0>;

  1938. 					compatible = "aspeed,ast2500-i2c-bus";

  1939. 					clocks = <0x02 0x1a>;

  1940. 					resets = <0x02 0x07>;

  1941. 					status = "okay";

  1942. 					#interrupt-cells = <0x01>;

  1943. 					interrupt-parent = <0x1b>;

  1944. 					#address-cells = <0x01>;

  1945. 					interrupts = <0x05>;

  1946. 					#size-cells = <0x00>;

  1947. 					reg = <0x180 0x40>;

  1948. 					pinctrl-0 = <0x1f>;

  1949. 					pinctrl-names = "default";

  1950. 				};

  1951. 

  1952. 				i2c-bus@480 {

  1953. 					bus-frequency = <0x186a0>;

  1954. 					compatible = "aspeed,ast2500-i2c-bus";

  1955. 					clocks = <0x02 0x1a>;

  1956. 					resets = <0x02 0x07>;

  1957. 					status = "disabled";

  1958. 					#interrupt-cells = <0x01>;

  1959. 					interrupt-parent = <0x1b>;

  1960. 					#address-cells = <0x01>;

  1961. 					interrupts = <0x0d>;

  1962. 					#size-cells = <0x00>;

  1963. 					reg = <0x480 0x40>;

  1964. 					pinctrl-0 = <0x27>;

  1965. 					pinctrl-names = "default";

  1966. 				};

  1967. 

  1968. 				i2c-bus@140 {

  1969. 					bus-frequency = <0x186a0>;

  1970. 					compatible = "aspeed,ast2500-i2c-bus";

  1971. 					clocks = <0x02 0x1a>;

  1972. 					resets = <0x02 0x07>;

  1973. 					status = "okay";

  1974. 					#interrupt-cells = <0x01>;

  1975. 					interrupt-parent = <0x1b>;

  1976. 					#address-cells = <0x01>;

  1977. 					interrupts = <0x04>;

  1978. 					#size-cells = <0x00>;

  1979. 					reg = <0x140 0x40>;

  1980. 					pinctrl-0 = <0x1e>;

  1981. 					pinctrl-names = "default";

  1982. 				};

  1983. 

  1984. 				i2c-bus@1c0 {

  1985. 					bus-frequency = <0x186a0>;

  1986. 					compatible = "aspeed,ast2500-i2c-bus";

  1987. 					clocks = <0x02 0x1a>;

  1988. 					resets = <0x02 0x07>;

  1989. 					status = "okay";

  1990. 					#interrupt-cells = <0x01>;

  1991. 					interrupt-parent = <0x1b>;

  1992. 					#address-cells = <0x01>;

  1993. 					interrupts = <0x06>;

  1994. 					#size-cells = <0x00>;

  1995. 					reg = <0x1c0 0x40>;

  1996. 					pinctrl-0 = <0x20>;

  1997. 					pinctrl-names = "default";

  1998. 				};

  1999. 

  2000. 				i2c-bus@440 {

  2001. 					bus-frequency = <0x2710>;

  2002. 					compatible = "aspeed,ast2500-i2c-bus";

  2003. 					clocks = <0x02 0x1a>;

  2004. 					resets = <0x02 0x07>;

  2005. 					status = "okay";

  2006. 					#interrupt-cells = <0x01>;

  2007. 					interrupt-parent = <0x1b>;

  2008. 					#address-cells = <0x01>;

  2009. 					interrupts = <0x0c>;

  2010. 					#size-cells = <0x00>;

  2011. 					reg = <0x440 0x40>;

  2012. 					pinctrl-0 = <0x26>;

  2013. 					pinctrl-names = "default";

  2014. 

  2015. 					w83773g@4c {

  2016. 						compatible = "nuvoton,w83773g";

  2017. 						reg = <0x4c>;

  2018. 					};

  2019. 				};

  2020. 

  2021. 				i2c-bus@100 {

  2022. 					bus-frequency = <0x186a0>;

  2023. 					compatible = "aspeed,ast2500-i2c-bus";

  2024. 					clocks = <0x02 0x1a>;

  2025. 					resets = <0x02 0x07>;

  2026. 					status = "okay";

  2027. 					#interrupt-cells = <0x01>;

  2028. 					interrupt-parent = <0x1b>;

  2029. 					#address-cells = <0x01>;

  2030. 					interrupts = <0x03>;

  2031. 					#size-cells = <0x00>;

  2032. 					reg = <0x100 0x40>;

  2033. 					pinctrl-0 = <0x1d>;

  2034. 					pinctrl-names = "default";

  2035. 				};

  2036. 

  2037. 				i2c-bus@80 {

  2038. 					bus-frequency = <0x186a0>;

  2039. 					compatible = "aspeed,ast2500-i2c-bus";

  2040. 					clocks = <0x02 0x1a>;

  2041. 					resets = <0x02 0x07>;

  2042. 					status = "disabled";

  2043. 					#interrupt-cells = <0x01>;

  2044. 					interrupt-parent = <0x1b>;

  2045. 					#address-cells = <0x01>;

  2046. 					interrupts = <0x01>;

  2047. 					#size-cells = <0x00>;

  2048. 					reg = <0x80 0x40>;

  2049. 				};

  2050. 

  2051. 				i2c-bus@400 {

  2052. 					bus-frequency = <0x186a0>;

  2053. 					compatible = "aspeed,ast2500-i2c-bus";

  2054. 					clocks = <0x02 0x1a>;

  2055. 					resets = <0x02 0x07>;

  2056. 					status = "okay";

  2057. 					#interrupt-cells = <0x01>;

  2058. 					interrupt-parent = <0x1b>;

  2059. 					#address-cells = <0x01>;

  2060. 					interrupts = <0x0b>;

  2061. 					#size-cells = <0x00>;

  2062. 					reg = <0x400 0x40>;

  2063. 					pinctrl-0 = <0x25>;

  2064. 					pinctrl-names = "default";

  2065. 

  2066. 					rtc@32 {

  2067. 						compatible = "epson,rx8900";

  2068. 						reg = <0x32>;

  2069. 					};

  2070. 				};

  2071. 

  2072. 				i2c-bus@40 {

  2073. 					bus-frequency = <0x186a0>;

  2074. 					compatible = "aspeed,ast2500-i2c-bus";

  2075. 					clocks = <0x02 0x1a>;

  2076. 					resets = <0x02 0x07>;

  2077. 					status = "okay";

  2078. 					#interrupt-cells = <0x01>;

  2079. 					interrupt-parent = <0x1b>;

  2080. 					#address-cells = <0x01>;

  2081. 					interrupts = <0x00>;

  2082. 					#size-cells = <0x00>;

  2083. 					reg = <0x40 0x40>;

  2084. 

  2085. 					eeprom@54 {

  2086. 						compatible = "atmel,24c256";

  2087. 						pagesize = <0x40>;

  2088. 						reg = <0x54>;

  2089. 					};

  2090. 

  2091. 					eeprom@57 {

  2092. 						compatible = "atmel,24c256";

  2093. 						pagesize = <0x40>;

  2094. 						reg = <0x57>;

  2095. 					};

  2096. 

  2097. 					eeprom@55 {

  2098. 						compatible = "atmel,24c256";

  2099. 						pagesize = <0x40>;

  2100. 						reg = <0x55>;

  2101. 					};

  2102. 

  2103. 					eeprom@56 {

  2104. 						compatible = "atmel,24c256";

  2105. 						pagesize = <0x40>;

  2106. 						reg = <0x56>;

  2107. 					};

  2108. 				};

  2109. 

  2110. 				i2c-bus@380 {

  2111. 					bus-frequency = <0x186a0>;

  2112. 					compatible = "aspeed,ast2500-i2c-bus";

  2113. 					clocks = <0x02 0x1a>;

  2114. 					resets = <0x02 0x07>;

  2115. 					status = "disabled";

  2116. 					#interrupt-cells = <0x01>;

  2117. 					interrupt-parent = <0x1b>;

  2118. 					#address-cells = <0x01>;

  2119. 					interrupts = <0x09>;

  2120. 					#size-cells = <0x00>;

  2121. 					reg = <0x380 0x40>;

  2122. 					pinctrl-0 = <0x23>;

  2123. 					pinctrl-names = "default";

  2124. 				};

  2125. 

  2126. 				i2c-bus@c0 {

  2127. 					bus-frequency = <0x186a0>;

  2128. 					compatible = "aspeed,ast2500-i2c-bus";

  2129. 					clocks = <0x02 0x1a>;

  2130. 					resets = <0x02 0x07>;

  2131. 					status = "okay";

  2132. 					#interrupt-cells = <0x01>;

  2133. 					interrupt-parent = <0x1b>;

  2134. 					#address-cells = <0x01>;

  2135. 					interrupts = <0x02>;

  2136. 					#size-cells = <0x00>;

  2137. 					reg = <0xc0 0x40>;

  2138. 					pinctrl-0 = <0x1c>;

  2139. 					pinctrl-names = "default";

  2140. 				};

  2141. 			};

  2142. 

  2143. 			serial@1e78e000 {

  2144. 				compatible = "ns16550a";

  2145. 				clocks = <0x02 0x14>;

  2146. 				resets = <0x0e 0x06>;

  2147. 				status = "disabled";

  2148. 				interrupts = <0x21>;

  2149. 				reg = <0x1e78e000 0x20>;

  2150. 				reg-shift = <0x02>;

  2151. 				no-loopback-test;

  2152. 			};

  2153. 

  2154. 			rtc@1e781000 {

  2155. 				compatible = "aspeed,ast2500-rtc";

  2156. 				status = "disabled";

  2157. 				reg = <0x1e781000 0x18>;

  2158. 			};

  2159. 

  2160. 			pwm-tacho-controller@1e786000 {

  2161. 				compatible = "aspeed,ast2500-pwm-tacho";

  2162. 				clocks = <0x02 0x23>;

  2163. 				resets = <0x02 0x05>;

  2164. 				status = "okay";

  2165. 				#address-cells = <0x01>;

  2166. 				#size-cells = <0x00>;

  2167. 				reg = <0x1e786000 0x1000>;

  2168. 				pinctrl-0 = <0x17 0x18>;

  2169. 				pinctrl-names = "default";

  2170. 

  2171. 				fan@2 {

  2172. 					aspeed,fan-tach-ch = [0a];

  2173. 					reg = <0x01>;

  2174. 				};

  2175. 

  2176. 				fan@0 {

  2177. 					aspeed,fan-tach-ch = [08];

  2178. 					reg = <0x00>;

  2179. 				};

  2180. 

  2181. 				fan@1 {

  2182. 					aspeed,fan-tach-ch = [09];

  2183. 					reg = <0x00>;

  2184. 				};

  2185. 			};

  2186. 

  2187. 			video@1e700000 {

  2188. 				compatible = "aspeed,ast2500-video-engine";

  2189. 				clocks = <0x02 0x03 0x02 0x00>;

  2190. 				clock-names = "vclk\0eclk";

  2191. 				status = "okay";

  2192. 				interrupts = <0x07>;

  2193. 				memory-region = <0x0c>;

  2194. 				reg = <0x1e700000 0x1000>;

  2195. 			};

  2196. 

  2197. 			watchdog@1e785040 {

  2198. 				compatible = "aspeed,ast2500-wdt";

  2199. 				clocks = <0x02 0x1a>;

  2200. 				status = "disabled";

  2201. 				reg = <0x1e785040 0x20>;

  2202. 			};

  2203. 		};

  2204. 	};

  2205. 

  2206. 	cpus {

  2207. 		#address-cells = <0x01>;

  2208. 		#size-cells = <0x00>;

  2209. 

  2210. 		cpu@0 {

  2211. 			compatible = "arm,arm1176jzf-s";

  2212. 			device_type = "cpu";

  2213. 			reg = <0x00>;

  2214. 		};

  2215. 	};

  2216. };