!BMC external buildroot tree. For building minimal Raptorcs Blackbird/Talos II bmc images.
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42 KiB

  1. /dts-v1/;
  2. / {
  3. compatible = "rcs,blackbird-bmc\0aspeed,ast2500";
  4. model = "Blackbird BMC";
  5. interrupt-parent = <0x01>;
  6. #address-cells = <0x01>;
  7. #size-cells = <0x01>;
  8. reserved-memory {
  9. ranges;
  10. #address-cells = <0x01>;
  11. #size-cells = <0x01>;
  12. region@98000000 {
  13. no-map;
  14. phandle = <0x19>;
  15. reg = <0x98000000 0x4000000>;
  16. };
  17. framebuffer@9f000000 {
  18. no-map;
  19. reg = <0x9f000000 0x1000000>;
  20. };
  21. jpegbuffer {
  22. reusable;
  23. compatible = "shared-dma-pool";
  24. alignment = <0x1000000>;
  25. size = <0x2000000>;
  26. phandle = <0x0c>;
  27. };
  28. codefire_memory@9ef00000 {
  29. no-map;
  30. phandle = <0x29>;
  31. reg = <0x9ef00000 0x100000>;
  32. };
  33. framebuffer {
  34. reusable;
  35. compatible = "shared-dma-pool";
  36. alignment = <0x1000000>;
  37. size = <0x1000000>;
  38. phandle = <0x0b>;
  39. };
  40. };
  41. gpio-fsi {
  42. data-gpios = <0x28 0x3a 0x00>;
  43. clock-gpios = <0x28 0x3b 0x00>;
  44. compatible = "aspeed,ast2500-cf-fsi-master\0fsi-master";
  45. no-gpio-delays;
  46. mux-gpios = <0x28 0x06 0x00>;
  47. aspeed,cvic = <0x2b>;
  48. #address-cells = <0x02>;
  49. memory-region = <0x29>;
  50. #size-cells = <0x00>;
  51. aspeed,sram = <0x2a>;
  52. enable-gpios = <0x28 0x18 0x00>;
  53. trans-gpios = <0x28 0x39 0x00>;
  54. cfam@0,0 {
  55. chip-id = <0x00>;
  56. #address-cells = <0x01>;
  57. #size-cells = <0x01>;
  58. reg = <0x00 0x00>;
  59. i2c@1800 {
  60. compatible = "ibm,fsi-i2c-master";
  61. #address-cells = <0x01>;
  62. #size-cells = <0x00>;
  63. reg = <0x1800 0x400>;
  64. i2c-bus@4 {
  65. reg = <0x04>;
  66. };
  67. i2c-bus@b {
  68. reg = <0x0b>;
  69. };
  70. i2c-bus@2 {
  71. reg = <0x02>;
  72. };
  73. i2c-bus@0 {
  74. reg = <0x00>;
  75. };
  76. i2c-bus@9 {
  77. reg = <0x09>;
  78. };
  79. i2c-bus@7 {
  80. reg = <0x07>;
  81. };
  82. i2c-bus@e {
  83. reg = <0x0e>;
  84. };
  85. i2c-bus@5 {
  86. reg = <0x05>;
  87. };
  88. i2c-bus@c {
  89. reg = <0x0c>;
  90. };
  91. i2c-bus@3 {
  92. reg = <0x03>;
  93. };
  94. i2c-bus@a {
  95. reg = <0x0a>;
  96. };
  97. i2c-bus@1 {
  98. reg = <0x01>;
  99. };
  100. i2c-bus@8 {
  101. reg = <0x08>;
  102. };
  103. i2c-bus@6 {
  104. reg = <0x06>;
  105. };
  106. i2c-bus@d {
  107. reg = <0x0d>;
  108. };
  109. };
  110. hub@3400 {
  111. compatible = "fsi-master-hub";
  112. no-scan-on-init;
  113. #address-cells = <0x02>;
  114. #size-cells = <0x00>;
  115. reg = <0x3400 0x400>;
  116. cfam@1,0 {
  117. chip-id = <0x01>;
  118. #address-cells = <0x01>;
  119. #size-cells = <0x01>;
  120. reg = <0x01 0x00>;
  121. i2c@1800 {
  122. compatible = "ibm,fsi-i2c-master";
  123. #address-cells = <0x01>;
  124. #size-cells = <0x00>;
  125. reg = <0x1800 0x400>;
  126. i2c-bus@4 {
  127. reg = <0x04>;
  128. };
  129. i2c-bus@b {
  130. reg = <0x0b>;
  131. };
  132. i2c-bus@2 {
  133. reg = <0x02>;
  134. };
  135. i2c-bus@0 {
  136. reg = <0x00>;
  137. };
  138. i2c-bus@9 {
  139. reg = <0x09>;
  140. };
  141. i2c-bus@7 {
  142. reg = <0x07>;
  143. };
  144. i2c-bus@e {
  145. reg = <0x0e>;
  146. };
  147. i2c-bus@5 {
  148. reg = <0x05>;
  149. };
  150. i2c-bus@c {
  151. reg = <0x0c>;
  152. };
  153. i2c-bus@3 {
  154. reg = <0x03>;
  155. };
  156. i2c-bus@a {
  157. reg = <0x0a>;
  158. };
  159. i2c-bus@1 {
  160. reg = <0x01>;
  161. };
  162. i2c-bus@8 {
  163. reg = <0x08>;
  164. };
  165. i2c-bus@6 {
  166. reg = <0x06>;
  167. };
  168. i2c-bus@d {
  169. reg = <0x0d>;
  170. };
  171. };
  172. hub@3400 {
  173. compatible = "fsi-master-hub";
  174. no-scan-on-init;
  175. #address-cells = <0x02>;
  176. #size-cells = <0x00>;
  177. reg = <0x3400 0x400>;
  178. };
  179. scom@1000 {
  180. compatible = "ibm,fsi2pib";
  181. reg = <0x1000 0x400>;
  182. };
  183. sbefifo@2400 {
  184. compatible = "ibm,p9-sbefifo";
  185. #address-cells = <0x01>;
  186. #size-cells = <0x00>;
  187. reg = <0x2400 0x400>;
  188. occ {
  189. compatible = "ibm,p9-occ";
  190. reg = <0x02>;
  191. };
  192. };
  193. };
  194. };
  195. scom@1000 {
  196. compatible = "ibm,fsi2pib";
  197. reg = <0x1000 0x400>;
  198. };
  199. sbefifo@2400 {
  200. compatible = "ibm,p9-sbefifo";
  201. #address-cells = <0x01>;
  202. #size-cells = <0x00>;
  203. reg = <0x2400 0x400>;
  204. occ {
  205. compatible = "ibm,p9-occ";
  206. reg = <0x01>;
  207. };
  208. };
  209. };
  210. };
  211. gpio-keys {
  212. compatible = "gpio-keys";
  213. id-button {
  214. gpios = <0x28 0x87 0x01>;
  215. label = "id-button";
  216. linux,code = <0x87>;
  217. };
  218. checkstop {
  219. gpios = <0x28 0x4a 0x01>;
  220. label = "checkstop";
  221. linux,code = <0x4a>;
  222. };
  223. };
  224. leds {
  225. compatible = "gpio-leds";
  226. identify {
  227. gpios = <0x28 0x6c 0x00>;
  228. };
  229. power {
  230. gpios = <0x28 0x8d 0x01>;
  231. };
  232. bmc_beep {
  233. gpios = <0x28 0x6f 0x01>;
  234. };
  235. bmc_ready {
  236. gpios = <0x28 0x89 0x01>;
  237. };
  238. fault {
  239. gpios = <0x28 0x6a 0x01>;
  240. };
  241. };
  242. aliases {
  243. i2c3 = "/ahb/apb/bus@1e78a000/i2c-bus@100";
  244. i2c202 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@2";
  245. i2c108 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@8";
  246. i2c10 = "/ahb/apb/bus@1e78a000/i2c-bus@3c0";
  247. i2c210 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@a";
  248. i2c1 = "/ahb/apb/bus@1e78a000/i2c-bus@80";
  249. i2c200 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@0";
  250. i2c106 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@6";
  251. i2c209 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@9";
  252. i2c114 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@e";
  253. i2c104 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@4";
  254. serial5 = "/ahb/apb/serial@1e787000";
  255. i2c8 = "/ahb/apb/bus@1e78a000/i2c-bus@340";
  256. i2c207 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@7";
  257. i2c112 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@c";
  258. i2c102 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@2";
  259. serial3 = "/ahb/apb/serial@1e78f000";
  260. i2c6 = "/ahb/apb/bus@1e78a000/i2c-bus@1c0";
  261. i2c205 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@5";
  262. i2c110 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@a";
  263. i2c13 = "/ahb/apb/bus@1e78a000/i2c-bus@480";
  264. i2c100 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@0";
  265. i2c213 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@d";
  266. serial1 = "/ahb/apb/serial@1e78d000";
  267. i2c4 = "/ahb/apb/bus@1e78a000/i2c-bus@140";
  268. i2c203 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@3";
  269. peci0 = "/ahb/apb/bus@1e78b000/peci-bus@0";
  270. i2c109 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@9";
  271. i2c11 = "/ahb/apb/bus@1e78a000/i2c-bus@400";
  272. i2c211 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@b";
  273. i2c2 = "/ahb/apb/bus@1e78a000/i2c-bus@c0";
  274. i2c201 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@1";
  275. i2c107 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@7";
  276. i2c0 = "/ahb/apb/bus@1e78a000/i2c-bus@40";
  277. i2c105 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@5";
  278. i2c9 = "/ahb/apb/bus@1e78a000/i2c-bus@380";
  279. i2c208 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@8";
  280. i2c113 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@d";
  281. i2c103 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@3";
  282. serial4 = "/ahb/apb/serial@1e784000";
  283. i2c7 = "/ahb/apb/bus@1e78a000/i2c-bus@300";
  284. i2c206 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@6";
  285. i2c111 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@b";
  286. i2c101 = "/gpio-fsi/cfam@0,0/i2c@1800/i2c-bus@1";
  287. i2c214 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@e";
  288. serial2 = "/ahb/apb/serial@1e78e000";
  289. i2c5 = "/ahb/apb/bus@1e78a000/i2c-bus@180";
  290. i2c204 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@4";
  291. i2c12 = "/ahb/apb/bus@1e78a000/i2c-bus@440";
  292. i2c212 = "/gpio-fsi/cfam@0,0/hub@3400/cfam@1,0/i2c@1800/i2c-bus@c";
  293. serial0 = "/ahb/apb/serial@1e783000";
  294. };
  295. chosen {
  296. stdout-path = "/ahb/apb/serial@1e784000";
  297. bootargs = "console=ttyS4,115200n8";
  298. };
  299. iio-hwmon-battery {
  300. io-channels = <0x2c 0x0c>;
  301. compatible = "iio-hwmon";
  302. };
  303. memory@80000000 {
  304. device_type = "memory";
  305. reg = <0x80000000 0x1f000000>;
  306. };
  307. ahb {
  308. compatible = "simple-bus";
  309. ranges;
  310. #address-cells = <0x01>;
  311. #size-cells = <0x01>;
  312. interrupt-controller@1e6c0080 {
  313. compatible = "aspeed,ast2400-vic";
  314. #interrupt-cells = <0x01>;
  315. phandle = <0x01>;
  316. valid-sources = <0xfefff7ff 0x807ffff>;
  317. reg = <0x1e6c0080 0x80>;
  318. interrupt-controller;
  319. };
  320. usb@1e6b0000 {
  321. compatible = "aspeed,ast2500-uhci\0generic-uhci";
  322. clocks = <0x02 0x09>;
  323. #ports = <0x02>;
  324. status = "disabled";
  325. interrupts = <0x0e>;
  326. reg = <0x1e6b0000 0x100>;
  327. };
  328. spi@1e631000 {
  329. compatible = "aspeed,ast2500-spi";
  330. clocks = <0x02 0x19>;
  331. status = "disabled";
  332. #address-cells = <0x01>;
  333. #size-cells = <0x00>;
  334. reg = <0x1e631000 0xc4 0x38000000 0x8000000>;
  335. flash@1 {
  336. compatible = "jedec,spi-nor";
  337. status = "disabled";
  338. reg = <0x01>;
  339. spi-max-frequency = <0x2faf080>;
  340. };
  341. flash@0 {
  342. compatible = "jedec,spi-nor";
  343. status = "disabled";
  344. reg = <0x00>;
  345. spi-max-frequency = <0x2faf080>;
  346. };
  347. };
  348. spi@1e620000 {
  349. compatible = "aspeed,ast2500-fmc";
  350. clocks = <0x02 0x19>;
  351. status = "okay";
  352. #address-cells = <0x01>;
  353. interrupts = <0x13>;
  354. #size-cells = <0x00>;
  355. reg = <0x1e620000 0xc4 0x20000000 0x10000000>;
  356. flash@1 {
  357. compatible = "jedec,spi-nor";
  358. status = "disabled";
  359. reg = <0x01>;
  360. spi-max-frequency = <0x2faf080>;
  361. };
  362. flash@2 {
  363. compatible = "jedec,spi-nor";
  364. status = "disabled";
  365. reg = <0x02>;
  366. spi-max-frequency = <0x2faf080>;
  367. };
  368. flash@0 {
  369. m25p,fast-read;
  370. compatible = "jedec,spi-nor";
  371. status = "okay";
  372. label = "bmc";
  373. reg = <0x00>;
  374. spi-max-frequency = <0x17d7840>;
  375. partitions {
  376. compatible = "fixed-partitions";
  377. #address-cells = <0x01>;
  378. #size-cells = <0x01>;
  379. dev-data@680000 {
  380. label = "dev-data";
  381. reg = <0x680000 0x100000>;
  382. };
  383. u-boot-env@60000 {
  384. label = "u-boot-env";
  385. reg = <0x60000 0x20000>;
  386. };
  387. u-boot@0 {
  388. label = "u-boot";
  389. reg = <0x00 0x60000>;
  390. };
  391. kernel_a@80000 {
  392. label = "kernel_a";
  393. reg = <0x80000 0x600000>;
  394. };
  395. rwfs@d80000 {
  396. label = "rwfs";
  397. reg = <0xd80000 0x1280000>;
  398. };
  399. kernel_b@780000 {
  400. label = "kernel_b";
  401. reg = <0x780000 0x600000>;
  402. };
  403. };
  404. };
  405. };
  406. ethernet@1e680000 {
  407. compatible = "aspeed,ast2500-mac\0faraday,ftgmac100";
  408. clocks = <0x02 0x12>;
  409. status = "disabled";
  410. interrupts = <0x03>;
  411. reg = <0x1e680000 0x180>;
  412. };
  413. usb-vhub@1e6a0000 {
  414. compatible = "aspeed,ast2500-usb-vhub";
  415. clocks = <0x02 0x0c>;
  416. status = "okay";
  417. interrupts = <0x05>;
  418. reg = <0x1e6a0000 0x300>;
  419. pinctrl-0 = <0x07>;
  420. pinctrl-names = "default";
  421. };
  422. spi@1e630000 {
  423. compatible = "aspeed,ast2500-spi";
  424. clocks = <0x02 0x19>;
  425. status = "okay";
  426. #address-cells = <0x01>;
  427. #size-cells = <0x00>;
  428. phandle = <0x1a>;
  429. reg = <0x1e630000 0xc4 0x30000000 0x8000000>;
  430. pinctrl-0 = <0x03>;
  431. pinctrl-names = "default";
  432. flash@1 {
  433. compatible = "jedec,spi-nor";
  434. status = "disabled";
  435. reg = <0x01>;
  436. spi-max-frequency = <0x2faf080>;
  437. };
  438. flash@0 {
  439. m25p,fast-read;
  440. compatible = "jedec,spi-nor";
  441. status = "okay";
  442. label = "pnor";
  443. reg = <0x00>;
  444. spi-max-frequency = <0x5f5e100>;
  445. };
  446. };
  447. usb@1e6a1000 {
  448. compatible = "aspeed,ast2500-ehci\0generic-ehci";
  449. clocks = <0x02 0x0c>;
  450. status = "disabled";
  451. interrupts = <0x05>;
  452. reg = <0x1e6a1000 0x100>;
  453. pinctrl-0 = <0x05>;
  454. pinctrl-names = "default";
  455. };
  456. copro-interrupt-controller@1e6c2000 {
  457. compatible = "aspeed,ast2500-cvic\0aspeed-cvic";
  458. copro-sw-interrupts = <0x01>;
  459. phandle = <0x2b>;
  460. valid-sources = <0xffffffff>;
  461. reg = <0x1e6c2000 0x80>;
  462. };
  463. ethernet@1e660000 {
  464. compatible = "aspeed,ast2500-mac\0faraday,ftgmac100";
  465. clocks = <0x02 0x11>;
  466. status = "okay";
  467. interrupts = <0x02>;
  468. use-ncsi;
  469. reg = <0x1e660000 0x180>;
  470. pinctrl-0 = <0x04>;
  471. pinctrl-names = "default";
  472. };
  473. usb@1e6a3000 {
  474. compatible = "aspeed,ast2500-ehci\0generic-ehci";
  475. clocks = <0x02 0x07>;
  476. status = "disabled";
  477. interrupts = <0x0d>;
  478. reg = <0x1e6a3000 0x100>;
  479. pinctrl-0 = <0x06>;
  480. pinctrl-names = "default";
  481. };
  482. apb {
  483. compatible = "simple-bus";
  484. ranges;
  485. #address-cells = <0x01>;
  486. #size-cells = <0x01>;
  487. syscon@1e6e2000 {
  488. compatible = "aspeed,ast2500-scu\0syscon\0simple-mfd";
  489. #reset-cells = <0x01>;
  490. #address-cells = <0x01>;
  491. #size-cells = <0x00>;
  492. #clock-cells = <0x01>;
  493. phandle = <0x02>;
  494. reg = <0x1e6e2000 0x1a8>;
  495. scratch {
  496. compatible = "aspeed,bmc-misc";
  497. dvo_mux {
  498. offset = <0x2c>;
  499. bit-mask = <0x01>;
  500. bit-shift = <0x12>;
  501. };
  502. vga6 {
  503. offset = <0x68>;
  504. bit-mask = <0xffffffff>;
  505. bit-shift = <0x00>;
  506. };
  507. vga4 {
  508. offset = <0x60>;
  509. bit-mask = <0xffffffff>;
  510. bit-shift = <0x00>;
  511. };
  512. vga2 {
  513. offset = <0x58>;
  514. bit-mask = <0xffffffff>;
  515. bit-shift = <0x00>;
  516. };
  517. vga0 {
  518. offset = <0x50>;
  519. bit-mask = <0xffffffff>;
  520. bit-shift = <0x00>;
  521. };
  522. vga7 {
  523. offset = <0x6c>;
  524. bit-mask = <0xffffffff>;
  525. bit-shift = <0x00>;
  526. };
  527. vga5 {
  528. offset = <0x64>;
  529. bit-mask = <0xffffffff>;
  530. bit-shift = <0x00>;
  531. };
  532. vga3 {
  533. offset = <0x5c>;
  534. bit-mask = <0xffffffff>;
  535. bit-shift = <0x00>;
  536. };
  537. vga1 {
  538. offset = <0x54>;
  539. bit-mask = <0xffffffff>;
  540. bit-shift = <0x00>;
  541. };
  542. dac_mux {
  543. offset = <0x2c>;
  544. bit-mask = <0x03>;
  545. bit-shift = <0x10>;
  546. };
  547. };
  548. pinctrl {
  549. compatible = "aspeed,g5-pinctrl";
  550. aspeed,external-nodes = <0x08 0x09>;
  551. phandle = <0x0d>;
  552. rgmii2_default {
  553. groups = "RGMII2";
  554. function = "RGMII2";
  555. };
  556. vpo_default {
  557. phandle = <0x0a>;
  558. groups = "VPO";
  559. function = "VPO";
  560. };
  561. lpcplus_default {
  562. groups = "LPCPLUS";
  563. function = "LPCPLUS";
  564. };
  565. ndtr3_default {
  566. groups = "NDTR3";
  567. function = "NDTR3";
  568. };
  569. nrts2_default {
  570. groups = "NRTS2";
  571. function = "NRTS2";
  572. };
  573. adc4_default {
  574. groups = "ADC4";
  575. function = "ADC4";
  576. };
  577. i2c4_default {
  578. phandle = <0x1d>;
  579. groups = "I2C4";
  580. function = "I2C4";
  581. };
  582. ndsr1_default {
  583. phandle = <0x13>;
  584. groups = "NDSR1";
  585. function = "NDSR1";
  586. };
  587. salt2_default {
  588. groups = "SALT2";
  589. function = "SALT2";
  590. };
  591. nri2_default {
  592. groups = "NRI2";
  593. function = "NRI2";
  594. };
  595. gpid0_default {
  596. groups = "GPID0";
  597. function = "GPID0";
  598. };
  599. lad3_default {
  600. groups = "LAD3";
  601. function = "LAD3";
  602. };
  603. pwm3_default {
  604. groups = "PWM3";
  605. function = "PWM3";
  606. };
  607. fwspics2_default {
  608. groups = "FWSPICS2";
  609. function = "FWSPICS2";
  610. };
  611. mac2link_default {
  612. groups = "MAC2LINK";
  613. function = "MAC2LINK";
  614. };
  615. rxd3_default {
  616. groups = "RXD3";
  617. function = "RXD3";
  618. };
  619. usbcki_default {
  620. groups = "USBCKI";
  621. function = "USBCKI";
  622. };
  623. ncts3_default {
  624. groups = "NCTS3";
  625. function = "NCTS3";
  626. };
  627. adc15_default {
  628. groups = "ADC15";
  629. function = "ADC15";
  630. };
  631. vgavs_default {
  632. groups = "VGAVS";
  633. function = "VGAVS";
  634. };
  635. adc1_default {
  636. groups = "ADC1";
  637. function = "ADC1";
  638. };
  639. siopbi_default {
  640. groups = "SIOPBI";
  641. function = "SIOPBI";
  642. };
  643. salt9_default {
  644. groups = "SALT9";
  645. function = "SALT9";
  646. };
  647. timer6_default {
  648. groups = "TIMER6";
  649. function = "TIMER6";
  650. };
  651. ddcdat_default {
  652. groups = "DDCDAT";
  653. function = "DDCDAT";
  654. };
  655. gpie6_default {
  656. groups = "GPIE6";
  657. function = "GPIE6";
  658. };
  659. ndcd2_default {
  660. groups = "NDCD2";
  661. function = "NDCD2";
  662. };
  663. lad0_default {
  664. groups = "LAD0";
  665. function = "LAD0";
  666. };
  667. spi1_default {
  668. phandle = <0x03>;
  669. groups = "SPI1";
  670. function = "SPI1";
  671. };
  672. pwm0_default {
  673. phandle = <0x17>;
  674. groups = "PWM0";
  675. function = "PWM0";
  676. };
  677. txd2_default {
  678. groups = "TXD2";
  679. function = "TXD2";
  680. };
  681. wdtrst1_default {
  682. groups = "WDTRST1";
  683. function = "WDTRST1";
  684. };
  685. adc12_default {
  686. groups = "ADC12";
  687. function = "ADC12";
  688. };
  689. i2c12_default {
  690. phandle = <0x25>;
  691. groups = "I2C12";
  692. function = "I2C12";
  693. };
  694. adc8_default {
  695. groups = "ADC8";
  696. function = "ADC8";
  697. };
  698. i2c8_default {
  699. phandle = <0x21>;
  700. groups = "I2C8";
  701. function = "I2C8";
  702. };
  703. salt13_default {
  704. groups = "SALT13";
  705. function = "SALT13";
  706. };
  707. salt6_default {
  708. groups = "SALT6";
  709. function = "SALT6";
  710. };
  711. timer3_default {
  712. groups = "TIMER3";
  713. function = "TIMER3";
  714. };
  715. usb11bhid_default {
  716. groups = "USB11BHID";
  717. function = "USB11BHID";
  718. };
  719. lpcsmi_default {
  720. groups = "LPCSMI";
  721. function = "LPCSMI";
  722. };
  723. lpcpd_default {
  724. groups = "LPCPD";
  725. function = "LPCPD";
  726. };
  727. gpid4_default {
  728. groups = "GPID4";
  729. function = "GPID4";
  730. };
  731. spi2mosi_default {
  732. groups = "SPI2MOSI";
  733. function = "SPI2MOSI";
  734. };
  735. sgps2_default {
  736. groups = "SGPS2";
  737. function = "SGPS2";
  738. };
  739. pwm7_default {
  740. groups = "PWM7";
  741. function = "PWM7";
  742. };
  743. spi1debug_default {
  744. groups = "SPI1DEBUG";
  745. function = "SPI1DEBUG";
  746. };
  747. scl1_default {
  748. groups = "SCL1";
  749. function = "SCL1";
  750. };
  751. sda1_default {
  752. groups = "SDA1";
  753. function = "SDA1";
  754. };
  755. ndtr4_default {
  756. groups = "NDTR4";
  757. function = "NDTR4";
  758. };
  759. nrts3_default {
  760. groups = "NRTS3";
  761. function = "NRTS3";
  762. };
  763. usb2ad_default {
  764. phandle = <0x07>;
  765. groups = "USB2AD";
  766. function = "USB2AD";
  767. };
  768. siopwreq_default {
  769. groups = "SIOPWREQ";
  770. function = "SIOPWREQ";
  771. };
  772. adc5_default {
  773. groups = "ADC5";
  774. function = "ADC5";
  775. };
  776. i2c5_default {
  777. phandle = <0x1e>;
  778. groups = "I2C5";
  779. function = "I2C5";
  780. };
  781. ndsr2_default {
  782. groups = "NDSR2";
  783. function = "NDSR2";
  784. };
  785. lframe_default {
  786. groups = "LFRAME";
  787. function = "LFRAME";
  788. };
  789. salt10_default {
  790. groups = "SALT10";
  791. function = "SALT10";
  792. };
  793. salt3_default {
  794. groups = "SALT3";
  795. function = "SALT3";
  796. };
  797. spi2cs0_default {
  798. groups = "SPI2CS0";
  799. function = "SPI2CS0";
  800. };
  801. sioonctrl_default {
  802. groups = "SIOONCTRL";
  803. function = "SIOONCTRL";
  804. };
  805. nri3_default {
  806. groups = "NRI3";
  807. function = "NRI3";
  808. };
  809. mdio1_default {
  810. groups = "MDIO1";
  811. function = "MDIO1";
  812. };
  813. ddcclk_default {
  814. groups = "DDCCLK";
  815. function = "DDCCLK";
  816. };
  817. sios5_default {
  818. groups = "SIOS5";
  819. function = "SIOS5";
  820. };
  821. gpie0_default {
  822. groups = "GPIE0";
  823. function = "GPIE0";
  824. };
  825. pwm4_default {
  826. groups = "PWM4";
  827. function = "PWM4";
  828. };
  829. sd1_default {
  830. groups = "SD1";
  831. function = "SD1";
  832. };
  833. lclk_default {
  834. groups = "LCLK";
  835. function = "LCLK";
  836. };
  837. rxd4_default {
  838. groups = "RXD4";
  839. function = "RXD4";
  840. };
  841. ndtr1_default {
  842. phandle = <0x12>;
  843. groups = "NDTR1";
  844. function = "NDTR1";
  845. };
  846. ncts4_default {
  847. groups = "NCTS4";
  848. function = "NCTS4";
  849. };
  850. adc2_default {
  851. groups = "ADC2";
  852. function = "ADC2";
  853. };
  854. vpi24_default {
  855. groups = "VPI24";
  856. function = "VPI24";
  857. };
  858. spi2ck_default {
  859. groups = "SPI2CK";
  860. function = "SPI2CK";
  861. };
  862. timer7_default {
  863. groups = "TIMER7";
  864. function = "TIMER7";
  865. };
  866. spi1cs1_default {
  867. groups = "SPI1CS1";
  868. function = "SPI1CS1";
  869. };
  870. bmcint_default {
  871. groups = "BMCINT";
  872. function = "BMCINT";
  873. };
  874. espi_default {
  875. groups = "ESPI";
  876. function = "ESPI";
  877. };
  878. ndcd3_default {
  879. groups = "NDCD3";
  880. function = "NDCD3";
  881. };
  882. lad1_default {
  883. groups = "LAD1";
  884. function = "LAD1";
  885. };
  886. pwm1_default {
  887. phandle = <0x18>;
  888. groups = "PWM1";
  889. function = "PWM1";
  890. };
  891. rxd1_default {
  892. phandle = <0x10>;
  893. groups = "RXD1";
  894. function = "RXD1";
  895. };
  896. txd3_default {
  897. groups = "TXD3";
  898. function = "TXD3";
  899. };
  900. rmii1_default {
  901. phandle = <0x04>;
  902. groups = "RMII1";
  903. function = "RMII1";
  904. };
  905. wdtrst2_default {
  906. groups = "WDTRST2";
  907. function = "WDTRST2";
  908. };
  909. ncts1_default {
  910. phandle = <0x14>;
  911. groups = "NCTS1";
  912. function = "NCTS1";
  913. };
  914. adc13_default {
  915. groups = "ADC13";
  916. function = "ADC13";
  917. };
  918. i2c13_default {
  919. phandle = <0x26>;
  920. groups = "I2C13";
  921. function = "I2C13";
  922. };
  923. usb2ah_default {
  924. phandle = <0x05>;
  925. groups = "USB2AH";
  926. function = "USB2AH";
  927. };
  928. pewake_default {
  929. groups = "PEWAKE";
  930. function = "PEWAKE";
  931. };
  932. adc9_default {
  933. groups = "ADC9";
  934. function = "ADC9";
  935. };
  936. i2c9_default {
  937. phandle = <0x22>;
  938. groups = "I2C9";
  939. function = "I2C9";
  940. };
  941. salt14_default {
  942. groups = "SALT14";
  943. function = "SALT14";
  944. };
  945. salt7_default {
  946. groups = "SALT7";
  947. function = "SALT7";
  948. };
  949. timer4_default {
  950. groups = "TIMER4";
  951. function = "TIMER4";
  952. };
  953. gpie4_default {
  954. groups = "GPIE4";
  955. function = "GPIE4";
  956. };
  957. vgabiosrom_default {
  958. groups = "VGABIOSROM";
  959. function = "VGABIOSROM";
  960. };
  961. lpchc_default {
  962. groups = "LPCHC";
  963. function = "LPCHC";
  964. };
  965. siosci_default {
  966. groups = "SIOSCI";
  967. function = "SIOSCI";
  968. };
  969. scl2_default {
  970. groups = "SCL2";
  971. function = "SCL2";
  972. };
  973. sda2_default {
  974. groups = "SDA2";
  975. function = "SDA2";
  976. };
  977. adc10_default {
  978. groups = "ADC10";
  979. function = "ADC10";
  980. };
  981. i2c10_default {
  982. phandle = <0x23>;
  983. groups = "I2C10";
  984. function = "I2C10";
  985. };
  986. nrts4_default {
  987. groups = "NRTS4";
  988. function = "NRTS4";
  989. };
  990. adc6_default {
  991. groups = "ADC6";
  992. function = "ADC6";
  993. };
  994. i2c6_default {
  995. phandle = <0x1f>;
  996. groups = "I2C6";
  997. function = "I2C6";
  998. };
  999. ndsr3_default {
  1000. groups = "NDSR3";
  1001. function = "NDSR3";
  1002. };
  1003. spi1passthru_default {
  1004. groups = "SPI1PASSTHRU";
  1005. function = "SPI1PASSTHRU";
  1006. };
  1007. salt11_default {
  1008. groups = "SALT11";
  1009. function = "SALT11";
  1010. };
  1011. salt4_default {
  1012. groups = "SALT4";
  1013. function = "SALT4";
  1014. };
  1015. spi2cs1_default {
  1016. groups = "SPI2CS1";
  1017. function = "SPI2CS1";
  1018. };
  1019. nri4_default {
  1020. groups = "NRI4";
  1021. function = "NRI4";
  1022. };
  1023. mdio2_default {
  1024. groups = "MDIO2";
  1025. function = "MDIO2";
  1026. };
  1027. gpid2_default {
  1028. groups = "GPID2";
  1029. function = "GPID2";
  1030. };
  1031. pwm5_default {
  1032. groups = "PWM5";
  1033. function = "PWM5";
  1034. };
  1035. sd2_default {
  1036. groups = "SD2";
  1037. function = "SD2";
  1038. };
  1039. rgmii1_default {
  1040. groups = "RGMII1";
  1041. function = "RGMII1";
  1042. };
  1043. pnor_default {
  1044. groups = "PNOR";
  1045. function = "PNOR";
  1046. };
  1047. ndtr2_default {
  1048. groups = "NDTR2";
  1049. function = "NDTR2";
  1050. };
  1051. acpi_default {
  1052. groups = "ACPI";
  1053. function = "ACPI";
  1054. };
  1055. nrts1_default {
  1056. phandle = <0x11>;
  1057. groups = "NRTS1";
  1058. function = "NRTS1";
  1059. };
  1060. adc3_default {
  1061. groups = "ADC3";
  1062. function = "ADC3";
  1063. };
  1064. i2c3_default {
  1065. phandle = <0x1c>;
  1066. groups = "I2C3";
  1067. function = "I2C3";
  1068. };
  1069. salt1_default {
  1070. groups = "SALT1";
  1071. function = "SALT1";
  1072. };
  1073. lsirq_default {
  1074. groups = "LSIRQ";
  1075. function = "LSIRQ";
  1076. };
  1077. timer8_default {
  1078. groups = "TIMER8";
  1079. function = "TIMER8";
  1080. };
  1081. nri1_default {
  1082. phandle = <0x16>;
  1083. groups = "NRI1";
  1084. function = "NRI1";
  1085. };
  1086. uart6_default {
  1087. groups = "UART6";
  1088. function = "UART6";
  1089. };
  1090. sios3_default {
  1091. groups = "SIOS3";
  1092. function = "SIOS3";
  1093. };
  1094. ndcd4_default {
  1095. groups = "NDCD4";
  1096. function = "NDCD4";
  1097. };
  1098. lad2_default {
  1099. groups = "LAD2";
  1100. function = "LAD2";
  1101. };
  1102. spi2miso_default {
  1103. groups = "SPI2MISO";
  1104. function = "SPI2MISO";
  1105. };
  1106. pwm2_default {
  1107. groups = "PWM2";
  1108. function = "PWM2";
  1109. };
  1110. fwspics1_default {
  1111. groups = "FWSPICS1";
  1112. function = "FWSPICS1";
  1113. };
  1114. oscclk_default {
  1115. groups = "OSCCLK";
  1116. function = "OSCCLK";
  1117. };
  1118. rxd2_default {
  1119. groups = "RXD2";
  1120. function = "RXD2";
  1121. };
  1122. txd4_default {
  1123. groups = "TXD4";
  1124. function = "TXD4";
  1125. };
  1126. rmii2_default {
  1127. groups = "RMII2";
  1128. function = "RMII2";
  1129. };
  1130. ncts2_default {
  1131. groups = "NCTS2";
  1132. function = "NCTS2";
  1133. };
  1134. adc14_default {
  1135. groups = "ADC14";
  1136. function = "ADC14";
  1137. };
  1138. i2c14_default {
  1139. phandle = <0x27>;
  1140. groups = "I2C14";
  1141. function = "I2C14";
  1142. };
  1143. adc0_default {
  1144. groups = "ADC0";
  1145. function = "ADC0";
  1146. };
  1147. usb2bh_default {
  1148. phandle = <0x06>;
  1149. groups = "USB2BH";
  1150. function = "USB2BH";
  1151. };
  1152. salt8_default {
  1153. groups = "SALT8";
  1154. function = "SALT8";
  1155. };
  1156. timer5_default {
  1157. groups = "TIMER5";
  1158. function = "TIMER5";
  1159. };
  1160. gpid6_default {
  1161. groups = "GPID6";
  1162. function = "GPID6";
  1163. };
  1164. ndcd1_default {
  1165. phandle = <0x15>;
  1166. groups = "NDCD1";
  1167. function = "NDCD1";
  1168. };
  1169. lpcpme_default {
  1170. groups = "LPCPME";
  1171. function = "LPCPME";
  1172. };
  1173. mac1link_default {
  1174. groups = "MAC1LINK";
  1175. function = "MAC1LINK";
  1176. };
  1177. txd1_default {
  1178. phandle = <0x0f>;
  1179. groups = "TXD1";
  1180. function = "TXD1";
  1181. };
  1182. adc11_default {
  1183. groups = "ADC11";
  1184. function = "ADC11";
  1185. };
  1186. i2c11_default {
  1187. phandle = <0x24>;
  1188. groups = "I2C11";
  1189. function = "I2C11";
  1190. };
  1191. vgahs_default {
  1192. groups = "VGAHS";
  1193. function = "VGAHS";
  1194. };
  1195. adc7_default {
  1196. groups = "ADC7";
  1197. function = "ADC7";
  1198. };
  1199. i2c7_default {
  1200. phandle = <0x20>;
  1201. groups = "I2C7";
  1202. function = "I2C7";
  1203. };
  1204. ndsr4_default {
  1205. groups = "NDSR4";
  1206. function = "NDSR4";
  1207. };
  1208. salt12_default {
  1209. groups = "SALT12";
  1210. function = "SALT12";
  1211. };
  1212. salt5_default {
  1213. groups = "SALT5";
  1214. function = "SALT5";
  1215. };
  1216. siopbo_default {
  1217. groups = "SIOPBO";
  1218. function = "SIOPBO";
  1219. };
  1220. siopwrgd_default {
  1221. groups = "SIOPWRGD";
  1222. function = "SIOPWRGD";
  1223. };
  1224. gpie2_default {
  1225. groups = "GPIE2";
  1226. function = "GPIE2";
  1227. };
  1228. lpcrst_default {
  1229. groups = "LPCRST";
  1230. function = "LPCRST";
  1231. };
  1232. sgps1_default {
  1233. groups = "SGPS1";
  1234. function = "SGPS1";
  1235. };
  1236. pwm6_default {
  1237. groups = "PWM6";
  1238. function = "PWM6";
  1239. };
  1240. };
  1241. };
  1242. watchdog@1e785020 {
  1243. compatible = "aspeed,ast2500-wdt";
  1244. clocks = <0x02 0x1a>;
  1245. reg = <0x1e785020 0x20>;
  1246. };
  1247. watchdog@1e785000 {
  1248. compatible = "aspeed,ast2500-wdt";
  1249. clocks = <0x02 0x1a>;
  1250. reg = <0x1e785000 0x20>;
  1251. };
  1252. serial@1e78d000 {
  1253. compatible = "ns16550a";
  1254. clocks = <0x02 0x0e>;
  1255. resets = <0x0e 0x05>;
  1256. status = "disabled";
  1257. interrupts = <0x20>;
  1258. reg = <0x1e78d000 0x20>;
  1259. reg-shift = <0x02>;
  1260. no-loopback-test;
  1261. };
  1262. sram@1e720000 {
  1263. compatible = "mmio-sram";
  1264. phandle = <0x2a>;
  1265. reg = <0x1e720000 0x9000>;
  1266. };
  1267. display@1e6e6000 {
  1268. reg-io-width = <0x04>;
  1269. compatible = "aspeed,ast2500-gfx\0syscon";
  1270. clocks = <0x02 0x0a>;
  1271. resets = <0x02 0x09>;
  1272. status = "okay";
  1273. interrupts = <0x19>;
  1274. memory-region = <0x0b>;
  1275. phandle = <0x08>;
  1276. reg = <0x1e6e6000 0x1000>;
  1277. pinctrl-0 = <0x0a>;
  1278. output-dvo;
  1279. pinctrl-names = "default";
  1280. };
  1281. serial@1e787000 {
  1282. compatible = "aspeed,ast2500-vuart";
  1283. clocks = <0x02 0x1a>;
  1284. status = "okay";
  1285. interrupts = <0x08>;
  1286. reg = <0x1e787000 0x40>;
  1287. reg-shift = <0x02>;
  1288. no-loopback-test;
  1289. };
  1290. serial@1e784000 {
  1291. compatible = "ns16550a";
  1292. clocks = <0x02 0x0f>;
  1293. status = "okay";
  1294. interrupts = <0x0a>;
  1295. reg = <0x1e784000 0x20>;
  1296. reg-shift = <0x02>;
  1297. no-loopback-test;
  1298. };
  1299. bus@1e78b000 {
  1300. compatible = "simple-bus";
  1301. ranges = <0x00 0x1e78b000 0x60>;
  1302. #address-cells = <0x01>;
  1303. #size-cells = <0x01>;
  1304. peci-bus@0 {
  1305. rd-sampling-point = <0x08>;
  1306. compatible = "aspeed,ast2500-peci";
  1307. clocks = <0x02 0x06>;
  1308. resets = <0x02 0x06>;
  1309. status = "disabled";
  1310. addr-timing = <0x01>;
  1311. #address-cells = <0x01>;
  1312. interrupts = <0x0f>;
  1313. #size-cells = <0x00>;
  1314. reg = <0x00 0x60>;
  1315. clock-frequency = <0x16e3600>;
  1316. cmd-timeout-ms = <0x3e8>;
  1317. msg-timing = <0x01>;
  1318. };
  1319. };
  1320. lpc@1e789000 {
  1321. compatible = "aspeed,ast2500-lpc\0simple-mfd";
  1322. ranges = <0x00 0x1e789000 0x1000>;
  1323. #address-cells = <0x01>;
  1324. #size-cells = <0x01>;
  1325. reg = <0x1e789000 0x1000>;
  1326. lpc-host@80 {
  1327. reg-io-width = <0x04>;
  1328. compatible = "aspeed,ast2500-lpc-host\0simple-mfd\0syscon";
  1329. ranges = <0x00 0x80 0x1e0>;
  1330. #address-cells = <0x01>;
  1331. #size-cells = <0x01>;
  1332. reg = <0x80 0x1e0>;
  1333. regs {
  1334. compatible = "aspeed,bmc-misc";
  1335. sio_27 {
  1336. offset = <0xfc>;
  1337. bit-mask = <0xff>;
  1338. bit-shift = <0x18>;
  1339. };
  1340. sio_2e {
  1341. offset = <0xf4>;
  1342. bit-mask = <0xff>;
  1343. bit-shift = <0x10>;
  1344. };
  1345. sio_25 {
  1346. offset = <0xfc>;
  1347. bit-mask = <0xff>;
  1348. bit-shift = <0x08>;
  1349. };
  1350. sio_2c {
  1351. offset = <0xf4>;
  1352. bit-mask = <0xff>;
  1353. bit-shift = <0x00>;
  1354. };
  1355. sio_23 {
  1356. offset = <0xf8>;
  1357. bit-mask = <0xff>;
  1358. bit-shift = <0x18>;
  1359. };
  1360. sio_2a {
  1361. offset = <0xf0>;
  1362. bit-mask = <0xff>;
  1363. bit-shift = <0x10>;
  1364. };
  1365. sio_21 {
  1366. offset = <0xf8>;
  1367. bit-mask = <0xff>;
  1368. bit-shift = <0x08>;
  1369. };
  1370. sio_28 {
  1371. offset = <0xf0>;
  1372. bit-mask = <0xff>;
  1373. bit-shift = <0x00>;
  1374. };
  1375. sio_2f {
  1376. offset = <0xf4>;
  1377. bit-mask = <0xff>;
  1378. bit-shift = <0x18>;
  1379. };
  1380. sio_26 {
  1381. offset = <0xfc>;
  1382. bit-mask = <0xff>;
  1383. bit-shift = <0x10>;
  1384. };
  1385. sio_2d {
  1386. offset = <0xf4>;
  1387. bit-mask = <0xff>;
  1388. bit-shift = <0x08>;
  1389. };
  1390. sio_24 {
  1391. offset = <0xfc>;
  1392. bit-mask = <0xff>;
  1393. bit-shift = <0x00>;
  1394. };
  1395. sio_2b {
  1396. offset = <0xf0>;
  1397. bit-mask = <0xff>;
  1398. bit-shift = <0x18>;
  1399. };
  1400. sio_22 {
  1401. offset = <0xf8>;
  1402. bit-mask = <0xff>;
  1403. bit-shift = <0x10>;
  1404. };
  1405. sio_20 {
  1406. offset = <0xf8>;
  1407. bit-mask = <0xff>;
  1408. bit-shift = <0x00>;
  1409. };
  1410. sio_29 {
  1411. offset = <0xf0>;
  1412. bit-mask = <0xff>;
  1413. bit-shift = <0x08>;
  1414. };
  1415. };
  1416. lpc-ctrl@0 {
  1417. compatible = "aspeed,ast2500-lpc-ctrl";
  1418. clocks = <0x02 0x08>;
  1419. status = "okay";
  1420. memory-region = <0x19>;
  1421. reg = <0x00 0x80>;
  1422. flash = <0x1a>;
  1423. };
  1424. lhc@20 {
  1425. compatible = "aspeed,ast2500-lhc";
  1426. phandle = <0x09>;
  1427. reg = <0x20 0x24 0x48 0x08>;
  1428. };
  1429. kcs4@0 {
  1430. compatible = "aspeed,ast2500-kcs-bmc";
  1431. status = "disabled";
  1432. interrupts = <0x08>;
  1433. kcs_chan = <0x04>;
  1434. };
  1435. mbox@180 {
  1436. compatible = "aspeed,ast2500-mbox";
  1437. #mbox-cells = <0x01>;
  1438. status = "okay";
  1439. interrupts = <0x2e>;
  1440. reg = <0x180 0x5c>;
  1441. };
  1442. reset-controller@18 {
  1443. compatible = "aspeed,ast2500-lpc-reset";
  1444. #reset-cells = <0x01>;
  1445. phandle = <0x0e>;
  1446. reg = <0x18 0x04>;
  1447. };
  1448. lpc-snoop@0 {
  1449. compatible = "aspeed,ast2500-lpc-snoop";
  1450. status = "okay";
  1451. interrupts = <0x08>;
  1452. reg = <0x00 0x80>;
  1453. snoop-ports = <0x81 0x82>;
  1454. };
  1455. ibt@c0 {
  1456. compatible = "aspeed,ast2500-ibt-bmc";
  1457. status = "okay";
  1458. interrupts = <0x08>;
  1459. reg = <0xc0 0x18>;
  1460. };
  1461. };
  1462. lpc-bmc@0 {
  1463. reg-io-width = <0x04>;
  1464. compatible = "aspeed,ast2500-lpc-bmc\0simple-mfd\0syscon";
  1465. ranges = <0x00 0x00 0x80>;
  1466. #address-cells = <0x01>;
  1467. #size-cells = <0x01>;
  1468. reg = <0x00 0x80>;
  1469. kcs1@0 {
  1470. compatible = "aspeed,ast2500-kcs-bmc";
  1471. status = "disabled";
  1472. interrupts = <0x08>;
  1473. kcs_chan = <0x01>;
  1474. };
  1475. kcs3@0 {
  1476. compatible = "aspeed,ast2500-kcs-bmc";
  1477. status = "disabled";
  1478. interrupts = <0x08>;
  1479. kcs_chan = <0x03>;
  1480. };
  1481. kcs2@0 {
  1482. compatible = "aspeed,ast2500-kcs-bmc";
  1483. status = "disabled";
  1484. interrupts = <0x08>;
  1485. kcs_chan = <0x02>;
  1486. };
  1487. };
  1488. };
  1489. gpio@1e780000 {
  1490. compatible = "aspeed,ast2500-gpio";
  1491. clocks = <0x02 0x1a>;
  1492. gpio-controller;
  1493. gpio-ranges = <0x0d 0x00 0x00 0xdc>;
  1494. #interrupt-cells = <0x02>;
  1495. interrupts = <0x14>;
  1496. phandle = <0x28>;
  1497. reg = <0x1e780000 0x1000>;
  1498. #gpio-cells = <0x02>;
  1499. interrupt-controller;
  1500. nic_func_mode0 {
  1501. gpios = <0x1b 0x00>;
  1502. output-low;
  1503. gpio-hog;
  1504. line-name = "nic_func_mode0";
  1505. };
  1506. nic_func_mode1 {
  1507. gpios = <0x1c 0x00>;
  1508. output-low;
  1509. gpio-hog;
  1510. line-name = "nic_func_mode1";
  1511. };
  1512. };
  1513. serial@1e78f000 {
  1514. compatible = "ns16550a";
  1515. clocks = <0x02 0x15>;
  1516. resets = <0x0e 0x07>;
  1517. status = "disabled";
  1518. interrupts = <0x22>;
  1519. reg = <0x1e78f000 0x20>;
  1520. reg-shift = <0x02>;
  1521. no-loopback-test;
  1522. };
  1523. adc@1e6e9000 {
  1524. compatible = "aspeed,ast2500-adc";
  1525. clocks = <0x02 0x1a>;
  1526. resets = <0x02 0x02>;
  1527. #io-channel-cells = <0x01>;
  1528. status = "okay";
  1529. phandle = <0x2c>;
  1530. reg = <0x1e6e9000 0xb0>;
  1531. };
  1532. timer@1e782000 {
  1533. compatible = "aspeed,ast2400-timer";
  1534. clocks = <0x02 0x1a>;
  1535. clock-names = "PCLK";
  1536. interrupts = <0x10 0x11 0x12 0x23 0x24 0x25 0x26 0x27>;
  1537. reg = <0x1e782000 0x90>;
  1538. };
  1539. hwrng@1e6e2078 {
  1540. quality = <0x64>;
  1541. compatible = "timeriomem_rng";
  1542. period = <0x01>;
  1543. reg = <0x1e6e2078 0x04>;
  1544. };
  1545. serial@1e783000 {
  1546. compatible = "ns16550a";
  1547. clocks = <0x02 0x0d>;
  1548. resets = <0x0e 0x04>;
  1549. status = "okay";
  1550. interrupts = <0x09>;
  1551. reg = <0x1e783000 0x20>;
  1552. pinctrl-0 = <0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16>;
  1553. reg-shift = <0x02>;
  1554. no-loopback-test;
  1555. pinctrl-names = "default";
  1556. };
  1557. bus@1e78a000 {
  1558. compatible = "simple-bus";
  1559. ranges = <0x00 0x1e78a000 0x1000>;
  1560. #address-cells = <0x01>;
  1561. #size-cells = <0x01>;
  1562. i2c-bus@340 {
  1563. bus-frequency = <0x186a0>;
  1564. compatible = "aspeed,ast2500-i2c-bus";
  1565. clocks = <0x02 0x1a>;
  1566. resets = <0x02 0x07>;
  1567. status = "disabled";
  1568. #interrupt-cells = <0x01>;
  1569. interrupt-parent = <0x1b>;
  1570. #address-cells = <0x01>;
  1571. interrupts = <0x08>;
  1572. #size-cells = <0x00>;
  1573. reg = <0x340 0x40>;
  1574. pinctrl-0 = <0x22>;
  1575. pinctrl-names = "default";
  1576. };
  1577. i2c-bus@3c0 {
  1578. bus-frequency = <0x186a0>;
  1579. compatible = "aspeed,ast2500-i2c-bus";
  1580. clocks = <0x02 0x1a>;
  1581. resets = <0x02 0x07>;
  1582. status = "disabled";
  1583. #interrupt-cells = <0x01>;
  1584. interrupt-parent = <0x1b>;
  1585. #address-cells = <0x01>;
  1586. interrupts = <0x0a>;
  1587. #size-cells = <0x00>;
  1588. reg = <0x3c0 0x40>;
  1589. pinctrl-0 = <0x24>;
  1590. pinctrl-names = "default";
  1591. };
  1592. i2c-bus@300 {
  1593. bus-frequency = <0x186a0>;
  1594. compatible = "aspeed,ast2500-i2c-bus";
  1595. clocks = <0x02 0x1a>;
  1596. resets = <0x02 0x07>;
  1597. status = "okay";
  1598. #interrupt-cells = <0x01>;
  1599. interrupt-parent = <0x1b>;
  1600. #address-cells = <0x01>;
  1601. interrupts = <0x07>;
  1602. #size-cells = <0x00>;
  1603. reg = <0x300 0x40>;
  1604. pinctrl-0 = <0x21>;
  1605. pinctrl-names = "default";
  1606. };
  1607. interrupt-controller@0 {
  1608. compatible = "aspeed,ast2500-i2c-ic";
  1609. #interrupt-cells = <0x01>;
  1610. interrupts = <0x0c>;
  1611. phandle = <0x1b>;
  1612. reg = <0x00 0x40>;
  1613. interrupt-controller;
  1614. };
  1615. i2c-bus@180 {
  1616. bus-frequency = <0x186a0>;
  1617. compatible = "aspeed,ast2500-i2c-bus";
  1618. clocks = <0x02 0x1a>;
  1619. resets = <0x02 0x07>;
  1620. status = "okay";
  1621. #interrupt-cells = <0x01>;
  1622. interrupt-parent = <0x1b>;
  1623. #address-cells = <0x01>;
  1624. interrupts = <0x05>;
  1625. #size-cells = <0x00>;
  1626. reg = <0x180 0x40>;
  1627. pinctrl-0 = <0x1f>;
  1628. pinctrl-names = "default";
  1629. };
  1630. i2c-bus@480 {
  1631. bus-frequency = <0x186a0>;
  1632. compatible = "aspeed,ast2500-i2c-bus";
  1633. clocks = <0x02 0x1a>;
  1634. resets = <0x02 0x07>;
  1635. status = "disabled";
  1636. #interrupt-cells = <0x01>;
  1637. interrupt-parent = <0x1b>;
  1638. #address-cells = <0x01>;
  1639. interrupts = <0x0d>;
  1640. #size-cells = <0x00>;
  1641. reg = <0x480 0x40>;
  1642. pinctrl-0 = <0x27>;
  1643. pinctrl-names = "default";
  1644. };
  1645. i2c-bus@140 {
  1646. bus-frequency = <0x186a0>;
  1647. compatible = "aspeed,ast2500-i2c-bus";
  1648. clocks = <0x02 0x1a>;
  1649. resets = <0x02 0x07>;
  1650. status = "okay";
  1651. #interrupt-cells = <0x01>;
  1652. interrupt-parent = <0x1b>;
  1653. #address-cells = <0x01>;
  1654. interrupts = <0x04>;
  1655. #size-cells = <0x00>;
  1656. reg = <0x140 0x40>;
  1657. pinctrl-0 = <0x1e>;
  1658. pinctrl-names = "default";
  1659. };
  1660. i2c-bus@1c0 {
  1661. bus-frequency = <0x186a0>;
  1662. compatible = "aspeed,ast2500-i2c-bus";
  1663. clocks = <0x02 0x1a>;
  1664. resets = <0x02 0x07>;
  1665. status = "okay";
  1666. #interrupt-cells = <0x01>;
  1667. interrupt-parent = <0x1b>;
  1668. #address-cells = <0x01>;
  1669. interrupts = <0x06>;
  1670. #size-cells = <0x00>;
  1671. reg = <0x1c0 0x40>;
  1672. pinctrl-0 = <0x20>;
  1673. pinctrl-names = "default";
  1674. };
  1675. i2c-bus@440 {
  1676. bus-frequency = <0x2710>;
  1677. compatible = "aspeed,ast2500-i2c-bus";
  1678. clocks = <0x02 0x1a>;
  1679. resets = <0x02 0x07>;
  1680. status = "okay";
  1681. #interrupt-cells = <0x01>;
  1682. interrupt-parent = <0x1b>;
  1683. #address-cells = <0x01>;
  1684. interrupts = <0x0c>;
  1685. #size-cells = <0x00>;
  1686. reg = <0x440 0x40>;
  1687. pinctrl-0 = <0x26>;
  1688. pinctrl-names = "default";
  1689. w83773g@4c {
  1690. compatible = "nuvoton,w83773g";
  1691. reg = <0x4c>;
  1692. };
  1693. };
  1694. i2c-bus@100 {
  1695. bus-frequency = <0x186a0>;
  1696. compatible = "aspeed,ast2500-i2c-bus";
  1697. clocks = <0x02 0x1a>;
  1698. resets = <0x02 0x07>;
  1699. status = "okay";
  1700. #interrupt-cells = <0x01>;
  1701. interrupt-parent = <0x1b>;
  1702. #address-cells = <0x01>;
  1703. interrupts = <0x03>;
  1704. #size-cells = <0x00>;
  1705. reg = <0x100 0x40>;
  1706. pinctrl-0 = <0x1d>;
  1707. pinctrl-names = "default";
  1708. };
  1709. i2c-bus@80 {
  1710. bus-frequency = <0x186a0>;
  1711. compatible = "aspeed,ast2500-i2c-bus";
  1712. clocks = <0x02 0x1a>;
  1713. resets = <0x02 0x07>;
  1714. status = "disabled";
  1715. #interrupt-cells = <0x01>;
  1716. interrupt-parent = <0x1b>;
  1717. #address-cells = <0x01>;
  1718. interrupts = <0x01>;
  1719. #size-cells = <0x00>;
  1720. reg = <0x80 0x40>;
  1721. };
  1722. i2c-bus@400 {
  1723. bus-frequency = <0x186a0>;
  1724. compatible = "aspeed,ast2500-i2c-bus";
  1725. clocks = <0x02 0x1a>;
  1726. resets = <0x02 0x07>;
  1727. status = "okay";
  1728. #interrupt-cells = <0x01>;
  1729. interrupt-parent = <0x1b>;
  1730. #address-cells = <0x01>;
  1731. interrupts = <0x0b>;
  1732. #size-cells = <0x00>;
  1733. reg = <0x400 0x40>;
  1734. pinctrl-0 = <0x25>;
  1735. pinctrl-names = "default";
  1736. rtc@32 {
  1737. compatible = "epson,rx8900";
  1738. reg = <0x32>;
  1739. };
  1740. };
  1741. i2c-bus@40 {
  1742. bus-frequency = <0x186a0>;
  1743. compatible = "aspeed,ast2500-i2c-bus";
  1744. clocks = <0x02 0x1a>;
  1745. resets = <0x02 0x07>;
  1746. status = "okay";
  1747. #interrupt-cells = <0x01>;
  1748. interrupt-parent = <0x1b>;
  1749. #address-cells = <0x01>;
  1750. interrupts = <0x00>;
  1751. #size-cells = <0x00>;
  1752. reg = <0x40 0x40>;
  1753. eeprom@54 {
  1754. compatible = "atmel,24c256";
  1755. pagesize = <0x40>;
  1756. reg = <0x54>;
  1757. };
  1758. eeprom@57 {
  1759. compatible = "atmel,24c256";
  1760. pagesize = <0x40>;
  1761. reg = <0x57>;
  1762. };
  1763. eeprom@55 {
  1764. compatible = "atmel,24c256";
  1765. pagesize = <0x40>;
  1766. reg = <0x55>;
  1767. };
  1768. eeprom@56 {
  1769. compatible = "atmel,24c256";
  1770. pagesize = <0x40>;
  1771. reg = <0x56>;
  1772. };
  1773. };
  1774. i2c-bus@380 {
  1775. bus-frequency = <0x186a0>;
  1776. compatible = "aspeed,ast2500-i2c-bus";
  1777. clocks = <0x02 0x1a>;
  1778. resets = <0x02 0x07>;
  1779. status = "disabled";
  1780. #interrupt-cells = <0x01>;
  1781. interrupt-parent = <0x1b>;
  1782. #address-cells = <0x01>;
  1783. interrupts = <0x09>;
  1784. #size-cells = <0x00>;
  1785. reg = <0x380 0x40>;
  1786. pinctrl-0 = <0x23>;
  1787. pinctrl-names = "default";
  1788. };
  1789. i2c-bus@c0 {
  1790. bus-frequency = <0x186a0>;
  1791. compatible = "aspeed,ast2500-i2c-bus";
  1792. clocks = <0x02 0x1a>;
  1793. resets = <0x02 0x07>;
  1794. status = "okay";
  1795. #interrupt-cells = <0x01>;
  1796. interrupt-parent = <0x1b>;
  1797. #address-cells = <0x01>;
  1798. interrupts = <0x02>;
  1799. #size-cells = <0x00>;
  1800. reg = <0xc0 0x40>;
  1801. pinctrl-0 = <0x1c>;
  1802. pinctrl-names = "default";
  1803. };
  1804. };
  1805. serial@1e78e000 {
  1806. compatible = "ns16550a";
  1807. clocks = <0x02 0x14>;
  1808. resets = <0x0e 0x06>;
  1809. status = "disabled";
  1810. interrupts = <0x21>;
  1811. reg = <0x1e78e000 0x20>;
  1812. reg-shift = <0x02>;
  1813. no-loopback-test;
  1814. };
  1815. rtc@1e781000 {
  1816. compatible = "aspeed,ast2500-rtc";
  1817. status = "disabled";
  1818. reg = <0x1e781000 0x18>;
  1819. };
  1820. pwm-tacho-controller@1e786000 {
  1821. compatible = "aspeed,ast2500-pwm-tacho";
  1822. clocks = <0x02 0x23>;
  1823. resets = <0x02 0x05>;
  1824. status = "okay";
  1825. #address-cells = <0x01>;
  1826. #size-cells = <0x00>;
  1827. reg = <0x1e786000 0x1000>;
  1828. pinctrl-0 = <0x17 0x18>;
  1829. pinctrl-names = "default";
  1830. fan@2 {
  1831. aspeed,fan-tach-ch = [0a];
  1832. reg = <0x01>;
  1833. };
  1834. fan@0 {
  1835. aspeed,fan-tach-ch = [08];
  1836. reg = <0x00>;
  1837. };
  1838. fan@1 {
  1839. aspeed,fan-tach-ch = [09];
  1840. reg = <0x00>;
  1841. };
  1842. };
  1843. video@1e700000 {
  1844. compatible = "aspeed,ast2500-video-engine";
  1845. clocks = <0x02 0x03 0x02 0x00>;
  1846. clock-names = "vclk\0eclk";
  1847. status = "okay";
  1848. interrupts = <0x07>;
  1849. memory-region = <0x0c>;
  1850. reg = <0x1e700000 0x1000>;
  1851. };
  1852. watchdog@1e785040 {
  1853. compatible = "aspeed,ast2500-wdt";
  1854. clocks = <0x02 0x1a>;
  1855. status = "disabled";
  1856. reg = <0x1e785040 0x20>;
  1857. };
  1858. };
  1859. };
  1860. cpus {
  1861. #address-cells = <0x01>;
  1862. #size-cells = <0x00>;
  1863. cpu@0 {
  1864. compatible = "arm,arm1176jzf-s";
  1865. device_type = "cpu";
  1866. reg = <0x00>;
  1867. };
  1868. };
  1869. };